forked from OSchip/llvm-project
[lanai] Change reloc to use PIC_ by default and cleanup.
* Change reloc to PIC_; * Cleanup (clang-format & modify test); llvm-svn: 270282
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@ -11,8 +11,8 @@
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//
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//===----------------------------------------------------------------------===//
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#include "Lanai.h"
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#include "LanaiInstPrinter.h"
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#include "Lanai.h"
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#include "MCTargetDesc/LanaiMCExpr.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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@ -138,7 +138,8 @@ bool LanaiInstPrinter::printAlias(const MCInst *MI, raw_ostream &OS) {
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void LanaiInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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StringRef Annotation,
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const MCSubtargetInfo &STI) {
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if (!printAlias(MI, OS) && !printAliasInstr(MI, OS)) printInstruction(MI, OS);
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if (!printAlias(MI, OS) && !printAliasInstr(MI, OS))
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printInstruction(MI, OS);
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printAnnotation(OS, Annotation);
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}
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@ -210,9 +211,11 @@ static void printMemoryBaseRegister(raw_ostream &OS, const unsigned AluCode,
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const MCOperand &RegOp) {
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assert(RegOp.isReg() && "Register operand expected");
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OS << "[";
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if (LPAC::isPreOp(AluCode)) OS << "*";
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if (LPAC::isPreOp(AluCode))
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OS << "*";
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OS << "%" << LanaiInstPrinter::getRegisterName(RegOp.getReg());
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if (LPAC::isPostOp(AluCode)) OS << "*";
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if (LPAC::isPostOp(AluCode))
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OS << "*";
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OS << "]";
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}
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@ -254,9 +257,11 @@ void LanaiInstPrinter::printMemRrOperand(const MCInst *MI, int OpNo,
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// [ Base OP Offset ]
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OS << "[";
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if (LPAC::isPreOp(AluCode)) OS << "*";
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if (LPAC::isPreOp(AluCode))
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OS << "*";
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OS << "%" << getRegisterName(RegOp.getReg());
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if (LPAC::isPostOp(AluCode)) OS << "*";
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if (LPAC::isPostOp(AluCode))
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OS << "*";
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OS << " " << LPAC::lanaiAluCodeToString(AluCode) << " ";
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OS << "%" << getRegisterName(OffsetOp.getReg());
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OS << "]";
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@ -12,8 +12,8 @@
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//
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//===----------------------------------------------------------------------===//
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#include "Lanai.h"
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#include "InstPrinter/LanaiInstPrinter.h"
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#include "Lanai.h"
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#include "LanaiInstrInfo.h"
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#include "LanaiMCInstLower.h"
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#include "LanaiTargetMachine.h"
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@ -249,7 +249,8 @@ void Filler::insertDefsUses(MachineBasicBlock::instr_iterator MI,
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// be inserted in the delay slot of a call/return as these instructions are
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// expanded to multiple instructions with SP modified before the branch that
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// has the delay slot.
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if (MI->isCall() || MI->isReturn()) RegDefs.insert(Lanai::SP);
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if (MI->isCall() || MI->isReturn())
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RegDefs.insert(Lanai::SP);
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}
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// Returns true if the Reg or its alias is in the RegSet.
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@ -11,8 +11,8 @@
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//
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//===----------------------------------------------------------------------===//
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#include "Lanai.h"
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#include "LanaiRegisterInfo.h"
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#include "Lanai.h"
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#include "LanaiSubtarget.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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@ -31,8 +31,7 @@
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using namespace llvm;
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LanaiRegisterInfo::LanaiRegisterInfo()
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: LanaiGenRegisterInfo(Lanai::RCA) {}
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LanaiRegisterInfo::LanaiRegisterInfo() : LanaiGenRegisterInfo(Lanai::RCA) {}
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const uint16_t *
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LanaiRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
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@ -18,8 +18,8 @@
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#include "LanaiTargetTransformInfo.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetOptions.h"
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@ -50,7 +50,7 @@ static std::string computeDataLayout(const Triple &TT) {
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static Reloc::Model getEffectiveRelocModel(const Triple &TT,
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Optional<Reloc::Model> RM) {
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if (!RM.hasValue())
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return Reloc::Static;
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return Reloc::PIC_;
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return *RM;
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}
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@ -106,8 +106,8 @@ LanaiTargetObjectFile::SelectSectionForGlobal(const GlobalValue *GV,
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}
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/// Return true if this constant should be placed into small data section.
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bool LanaiTargetObjectFile::isConstantInSmallSection(
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const DataLayout &DL, const Constant *CN) const {
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bool LanaiTargetObjectFile::isConstantInSmallSection(const DataLayout &DL,
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const Constant *CN) const {
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return isInSmallSection(DL.getTypeAllocSize(CN->getType()));
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}
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@ -3,11 +3,11 @@
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; RUN: FileCheck %s -check-prefix=CHECK-DIS
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; CHECK-LABEL: sum,
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; CHECK: ++],
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; CHECK: ld [%r{{[0-9]+}}++], %r{{[0-9]+}}{{$}}
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; CHECK-DIS-LABEL: sum,
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; CHECK-DIS-NOT: ++],
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define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) #0 {
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define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) {
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
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@ -27,14 +27,9 @@ for.body: ; preds = %for.body.preheader,
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%sum_.07 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %data, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4, !tbaa !0
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %sum_.07
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, %n
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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!0 = !{!1, !1, i64 0}
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!1 = !{!"int", !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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