forked from OSchip/llvm-project
This code implements most of mips16 hardfloat as it is done by gcc.
In this case, essentially it is soft float with different library routines. The next step will be to make this fully interoperational with mips32 floating point and that requires creating stubs for functions with signatures that contain floating point types. I have a more sophisticated design for mips16 hardfloat which I hope to implement at a later time that directly does floating point without the need for function calls. The mips16 encoding has no floating point instructions so one needs to switch to mips32 mode to execute floating point instructions. llvm-svn: 170259
This commit is contained in:
Reed Kotler
parent
a2de826d29
commit
5fdeb21249
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@ -50,6 +50,13 @@ static cl::opt<bool>
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LargeGOT("mxgot", cl::Hidden,
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cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false));
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static cl::opt<bool>
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Mips16HardFloat("mips16-hard-float", cl::NotHidden,
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cl::desc("MIPS: mips16 hard float enable."),
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cl::init(false));
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static const uint16_t O32IntRegs[4] = {
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Mips::A0, Mips::A1, Mips::A2, Mips::A3
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};
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@ -198,6 +205,41 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
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}
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}
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void MipsTargetLowering::setMips16HardFloatLibCalls() {
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setLibcallName(RTLIB::ADD_F32, "__mips16_addsf3");
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setLibcallName(RTLIB::ADD_F64, "__mips16_adddf3");
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setLibcallName(RTLIB::SUB_F32, "__mips16_subsf3");
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setLibcallName(RTLIB::SUB_F64, "__mips16_subdf3");
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setLibcallName(RTLIB::MUL_F32, "__mips16_mulsf3");
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setLibcallName(RTLIB::MUL_F64, "__mips16_muldf3");
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setLibcallName(RTLIB::DIV_F32, "__mips16_divsf3");
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setLibcallName(RTLIB::DIV_F64, "__mips16_divdf3");
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setLibcallName(RTLIB::FPEXT_F32_F64, "__mips16_extendsfdf2");
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setLibcallName(RTLIB::FPROUND_F64_F32, "__mips16_truncdfsf2");
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setLibcallName(RTLIB::FPTOSINT_F32_I32, "__mips16_fix_truncsfsi");
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setLibcallName(RTLIB::FPTOSINT_F64_I32, "__mips16_fix_truncdfsi");
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setLibcallName(RTLIB::SINTTOFP_I32_F32, "__mips16_floatsisf");
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setLibcallName(RTLIB::SINTTOFP_I32_F64, "__mips16_floatsidf");
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setLibcallName(RTLIB::UINTTOFP_I32_F32, "__mips16_floatunsisf");
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setLibcallName(RTLIB::UINTTOFP_I32_F64, "__mips16_floatunsidf");
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setLibcallName(RTLIB::OEQ_F32, "__mips16_eqsf2");
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setLibcallName(RTLIB::OEQ_F64, "__mips16_eqdf2");
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setLibcallName(RTLIB::UNE_F32, "__mips16_nesf2");
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setLibcallName(RTLIB::UNE_F64, "__mips16_nedf2");
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setLibcallName(RTLIB::OGE_F32, "__mips16_gesf2");
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setLibcallName(RTLIB::OGE_F64, "__mips16_gedf2");
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setLibcallName(RTLIB::OLT_F32, "__mips16_ltsf2");
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setLibcallName(RTLIB::OLT_F64, "__mips16_ltdf2");
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setLibcallName(RTLIB::OLE_F32, "__mips16_lesf2");
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setLibcallName(RTLIB::OLE_F64, "__mips16_ledf2");
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setLibcallName(RTLIB::OGT_F32, "__mips16_gtsf2");
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setLibcallName(RTLIB::OGT_F64, "__mips16_gtdf2");
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setLibcallName(RTLIB::UO_F32, "__mips16_unordsf2");
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setLibcallName(RTLIB::UO_F64, "__mips16_unorddf2");
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setLibcallName(RTLIB::O_F32, "__mips16_unordsf2");
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setLibcallName(RTLIB::O_F64, "__mips16_unorddf2");
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}
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MipsTargetLowering::
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MipsTargetLowering(MipsTargetMachine &TM)
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: TargetLowering(TM, new MipsTargetObjectFile()),
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@ -218,6 +260,8 @@ MipsTargetLowering(MipsTargetMachine &TM)
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if (Subtarget->inMips16Mode()) {
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addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
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if (Mips16HardFloat)
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setMips16HardFloatLibCalls();
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}
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if (Subtarget->hasDSP()) {
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@ -174,6 +174,8 @@ namespace llvm {
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virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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private:
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void setMips16HardFloatLibCalls();
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/// ByValArgInfo - Byval argument information.
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struct ByValArgInfo {
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unsigned FirstIdx; // Index of the first register used.
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@ -0,0 +1,381 @@
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 -soft-float -mips16-hard-float < %s | FileCheck %s -check-prefix=16hf
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@x = global float 5.000000e+00, align 4
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@y = global float 1.500000e+01, align 4
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@xd = global double 6.000000e+00, align 8
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@yd = global double 1.800000e+01, align 8
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@two = global i32 2, align 4
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@addsf3_result = common global float 0.000000e+00, align 4
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@adddf3_result = common global double 0.000000e+00, align 8
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@subsf3_result = common global float 0.000000e+00, align 4
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@subdf3_result = common global double 0.000000e+00, align 8
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@mulsf3_result = common global float 0.000000e+00, align 4
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@muldf3_result = common global double 0.000000e+00, align 8
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@divsf3_result = common global float 0.000000e+00, align 4
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@divdf3_result = common global double 0.000000e+00, align 8
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@extendsfdf2_result = common global double 0.000000e+00, align 8
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@xd2 = global double 0x40147E6B74B4CF6A, align 8
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@truncdfsf2_result = common global float 0.000000e+00, align 4
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@fix_truncsfsi_result = common global i32 0, align 4
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@fix_truncdfsi_result = common global i32 0, align 4
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@si = global i32 -9, align 4
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@ui = global i32 9, align 4
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@floatsisf_result = common global float 0.000000e+00, align 4
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@floatsidf_result = common global double 0.000000e+00, align 8
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@floatunsisf_result = common global float 0.000000e+00, align 4
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@floatunsidf_result = common global double 0.000000e+00, align 8
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@xx = global float 5.000000e+00, align 4
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@eqsf2_result = common global i32 0, align 4
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@xxd = global double 6.000000e+00, align 8
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@eqdf2_result = common global i32 0, align 4
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@nesf2_result = common global i32 0, align 4
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@nedf2_result = common global i32 0, align 4
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@gesf2_result = common global i32 0, align 4
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@gedf2_result = common global i32 0, align 4
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@ltsf2_result = common global i32 0, align 4
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@ltdf2_result = common global i32 0, align 4
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@lesf2_result = common global i32 0, align 4
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@ledf2_result = common global i32 0, align 4
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@gtsf2_result = common global i32 0, align 4
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@gtdf2_result = common global i32 0, align 4
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define void @test_addsf3() nounwind {
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entry:
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;16hf: test_addsf3:
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%0 = load float* @x, align 4
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%1 = load float* @y, align 4
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%add = fadd float %0, %1
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store float %add, float* @addsf3_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_addsf3)(${{[0-9]+}})
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ret void
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}
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define void @test_adddf3() nounwind {
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entry:
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;16hf: test_adddf3:
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%0 = load double* @xd, align 8
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%1 = load double* @yd, align 8
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%add = fadd double %0, %1
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store double %add, double* @adddf3_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_adddf3)(${{[0-9]+}})
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ret void
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}
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define void @test_subsf3() nounwind {
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entry:
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;16hf: test_subsf3:
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%0 = load float* @x, align 4
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%1 = load float* @y, align 4
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%sub = fsub float %0, %1
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store float %sub, float* @subsf3_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_subsf3)(${{[0-9]+}})
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ret void
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}
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define void @test_subdf3() nounwind {
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entry:
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;16hf: test_subdf3:
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%0 = load double* @xd, align 8
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%1 = load double* @yd, align 8
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%sub = fsub double %0, %1
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store double %sub, double* @subdf3_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_subdf3)(${{[0-9]+}})
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ret void
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}
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define void @test_mulsf3() nounwind {
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entry:
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;16hf: test_mulsf3:
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%0 = load float* @x, align 4
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%1 = load float* @y, align 4
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%mul = fmul float %0, %1
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store float %mul, float* @mulsf3_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_mulsf3)(${{[0-9]+}})
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ret void
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}
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define void @test_muldf3() nounwind {
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entry:
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;16hf: test_muldf3:
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%0 = load double* @xd, align 8
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%1 = load double* @yd, align 8
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%mul = fmul double %0, %1
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store double %mul, double* @muldf3_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_muldf3)(${{[0-9]+}})
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ret void
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}
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define void @test_divsf3() nounwind {
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entry:
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;16hf: test_divsf3:
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%0 = load float* @y, align 4
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%1 = load float* @x, align 4
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%div = fdiv float %0, %1
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store float %div, float* @divsf3_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_divsf3)(${{[0-9]+}})
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ret void
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}
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define void @test_divdf3() nounwind {
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entry:
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;16hf: test_divdf3:
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%0 = load double* @yd, align 8
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%mul = fmul double %0, 2.000000e+00
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%1 = load double* @xd, align 8
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%div = fdiv double %mul, %1
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store double %div, double* @divdf3_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_divdf3)(${{[0-9]+}})
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ret void
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}
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define void @test_extendsfdf2() nounwind {
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entry:
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;16hf: test_extendsfdf2:
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%0 = load float* @x, align 4
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%conv = fpext float %0 to double
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store double %conv, double* @extendsfdf2_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_extendsfdf2)(${{[0-9]+}})
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ret void
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}
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define void @test_truncdfsf2() nounwind {
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entry:
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;16hf: test_truncdfsf2:
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%0 = load double* @xd2, align 8
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%conv = fptrunc double %0 to float
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store float %conv, float* @truncdfsf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_truncdfsf2)(${{[0-9]+}})
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ret void
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}
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define void @test_fix_truncsfsi() nounwind {
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entry:
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;16hf: test_fix_truncsfsi:
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%0 = load float* @x, align 4
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%conv = fptosi float %0 to i32
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store i32 %conv, i32* @fix_truncsfsi_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_fix_truncsfsi)(${{[0-9]+}})
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ret void
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}
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define void @test_fix_truncdfsi() nounwind {
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entry:
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;16hf: test_fix_truncdfsi:
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%0 = load double* @xd, align 8
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%conv = fptosi double %0 to i32
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store i32 %conv, i32* @fix_truncdfsi_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_fix_truncdfsi)(${{[0-9]+}})
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ret void
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}
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define void @test_floatsisf() nounwind {
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entry:
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;16hf: test_floatsisf:
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%0 = load i32* @si, align 4
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%conv = sitofp i32 %0 to float
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store float %conv, float* @floatsisf_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_floatsisf)(${{[0-9]+}})
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ret void
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}
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define void @test_floatsidf() nounwind {
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entry:
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;16hf: test_floatsidf:
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%0 = load i32* @si, align 4
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%conv = sitofp i32 %0 to double
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store double %conv, double* @floatsidf_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_floatsidf)(${{[0-9]+}})
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ret void
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}
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define void @test_floatunsisf() nounwind {
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entry:
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;16hf: test_floatunsisf:
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%0 = load i32* @ui, align 4
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%conv = uitofp i32 %0 to float
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store float %conv, float* @floatunsisf_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_floatunsisf)(${{[0-9]+}})
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ret void
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}
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define void @test_floatunsidf() nounwind {
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entry:
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;16hf: test_floatunsidf:
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%0 = load i32* @ui, align 4
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%conv = uitofp i32 %0 to double
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store double %conv, double* @floatunsidf_result, align 8
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_floatunsidf)(${{[0-9]+}})
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ret void
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}
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define void @test_eqsf2() nounwind {
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entry:
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;16hf: test_eqsf2:
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%0 = load float* @x, align 4
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%1 = load float* @xx, align 4
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%cmp = fcmp oeq float %0, %1
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @eqsf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_eqsf2)(${{[0-9]+}})
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ret void
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}
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define void @test_eqdf2() nounwind {
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entry:
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;16hf: test_eqdf2:
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%0 = load double* @xd, align 8
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%1 = load double* @xxd, align 8
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%cmp = fcmp oeq double %0, %1
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @eqdf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_eqdf2)(${{[0-9]+}})
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ret void
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}
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define void @test_nesf2() nounwind {
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entry:
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;16hf: test_nesf2:
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%0 = load float* @x, align 4
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%1 = load float* @y, align 4
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%cmp = fcmp une float %0, %1
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @nesf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_nesf2)(${{[0-9]+}})
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ret void
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}
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define void @test_nedf2() nounwind {
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entry:
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;16hf: test_nedf2:
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%0 = load double* @xd, align 8
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%1 = load double* @yd, align 8
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%cmp = fcmp une double %0, %1
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%conv = zext i1 %cmp to i32
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store i32 %conv, i32* @nedf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_nedf2)(${{[0-9]+}})
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ret void
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}
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define void @test_gesf2() nounwind {
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entry:
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;16hf: test_gesf2:
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%0 = load float* @x, align 4
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%1 = load float* @xx, align 4
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%cmp = fcmp oge float %0, %1
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%2 = load float* @y, align 4
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%cmp1 = fcmp oge float %2, %0
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%and3 = and i1 %cmp, %cmp1
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%and = zext i1 %and3 to i32
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store i32 %and, i32* @gesf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_gesf2)(${{[0-9]+}})
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ret void
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}
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define void @test_gedf2() nounwind {
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entry:
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;16hf: test_gedf2:
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%0 = load double* @xd, align 8
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%1 = load double* @xxd, align 8
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%cmp = fcmp oge double %0, %1
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%2 = load double* @yd, align 8
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%cmp1 = fcmp oge double %2, %0
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%and3 = and i1 %cmp, %cmp1
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%and = zext i1 %and3 to i32
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store i32 %and, i32* @gedf2_result, align 4
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;16hf: lw ${{[0-9]+}}, %call16(__mips16_gedf2)(${{[0-9]+}})
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ret void
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}
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define void @test_ltsf2() nounwind {
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entry:
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;16hf: test_ltsf2:
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%0 = load float* @x, align 4
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%1 = load float* @xx, align 4
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%lnot = fcmp uge float %0, %1
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%2 = load float* @y, align 4
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%cmp1 = fcmp olt float %0, %2
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%and2 = and i1 %lnot, %cmp1
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%and = zext i1 %and2 to i32
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store i32 %and, i32* @ltsf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_unordsf2)(${{[0-9]+}})
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_ltsf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_ltdf2() nounwind {
|
||||
entry:
|
||||
;16hf: test_ltdf2:
|
||||
%0 = load double* @xd, align 8
|
||||
%1 = load double* @xxd, align 8
|
||||
%lnot = fcmp uge double %0, %1
|
||||
%2 = load double* @yd, align 8
|
||||
%cmp1 = fcmp olt double %0, %2
|
||||
%and2 = and i1 %lnot, %cmp1
|
||||
%and = zext i1 %and2 to i32
|
||||
store i32 %and, i32* @ltdf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_unorddf2)(${{[0-9]+}})
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_ltdf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_lesf2() nounwind {
|
||||
entry:
|
||||
;16hf: test_lesf2:
|
||||
%0 = load float* @x, align 4
|
||||
%1 = load float* @xx, align 4
|
||||
%cmp = fcmp ole float %0, %1
|
||||
%2 = load float* @y, align 4
|
||||
%cmp1 = fcmp ole float %0, %2
|
||||
%and3 = and i1 %cmp, %cmp1
|
||||
%and = zext i1 %and3 to i32
|
||||
store i32 %and, i32* @lesf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_lesf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_ledf2() nounwind {
|
||||
entry:
|
||||
;16hf: test_ledf2:
|
||||
%0 = load double* @xd, align 8
|
||||
%1 = load double* @xxd, align 8
|
||||
%cmp = fcmp ole double %0, %1
|
||||
%2 = load double* @yd, align 8
|
||||
%cmp1 = fcmp ole double %0, %2
|
||||
%and3 = and i1 %cmp, %cmp1
|
||||
%and = zext i1 %and3 to i32
|
||||
store i32 %and, i32* @ledf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_ledf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_gtsf2() nounwind {
|
||||
entry:
|
||||
;16hf: test_gtsf2:
|
||||
%0 = load float* @x, align 4
|
||||
%1 = load float* @xx, align 4
|
||||
%lnot = fcmp ule float %0, %1
|
||||
%2 = load float* @y, align 4
|
||||
%cmp1 = fcmp ogt float %2, %0
|
||||
%and2 = and i1 %lnot, %cmp1
|
||||
%and = zext i1 %and2 to i32
|
||||
store i32 %and, i32* @gtsf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_gtsf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @test_gtdf2() nounwind {
|
||||
entry:
|
||||
;16hf: test_gtdf2:
|
||||
%0 = load double* @xd, align 8
|
||||
%1 = load double* @xxd, align 8
|
||||
%lnot = fcmp ule double %0, %1
|
||||
%2 = load double* @yd, align 8
|
||||
%cmp1 = fcmp ogt double %2, %0
|
||||
%and2 = and i1 %lnot, %cmp1
|
||||
%and = zext i1 %and2 to i32
|
||||
store i32 %and, i32* @gtdf2_result, align 4
|
||||
;16hf: lw ${{[0-9]+}}, %call16(__mips16_gtdf2)(${{[0-9]+}})
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue