forked from OSchip/llvm-project
Remove x86 test amx-fast-tile-config.mir (by its author)
This test contains a lot of manual changes which is not convenient to update, and the checks are duplicated with test amx-configO2toO0.ll
This commit is contained in:
Xiang1 Zhang
parent
7daa182159
commit
5fc9653faa
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@ -1,465 +0,0 @@
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# RUN: llc -o - -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -run-pass=fasttileconfig %s | FileCheck %s
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--- |
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@buf = dso_local global [1024 x i8] zeroinitializer, align 16
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@buf2 = dso_local global [1024 x i8] zeroinitializer, align 16
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define dso_local void @test_api(i32 %cond, i16 signext %row, i16 signext %col) local_unnamed_addr #0 {
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entry:
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%0 = alloca <16 x i32>, align 4
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%1 = alloca <16 x i32>, align 4
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%2 = alloca <16 x i32>, align 4
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%3 = alloca <16 x i32>, align 4
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%4 = alloca <16 x i32>, align 4
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%5 = alloca <16 x i32>, align 4
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%6 = alloca <16 x i32>, align 4
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%7 = alloca <16 x i32>, align 4
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%8 = alloca <256 x i32>, align 1024
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%9 = bitcast <256 x i32>* %8 to i8*
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%10 = alloca <256 x i32>, align 1024
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%11 = bitcast <256 x i32>* %10 to i8*
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%12 = alloca <256 x i32>, align 1024
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%13 = bitcast <256 x i32>* %12 to i8*
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%14 = alloca <256 x i32>, align 1024
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%15 = bitcast <256 x i32>* %14 to i8*
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%tobool.not = icmp eq i32 %cond, 0
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br i1 %tobool.not, label %if.else, label %if.then
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if.then: ; preds = %entry
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%16 = bitcast <16 x i32>* %6 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %6, align 64
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%amx.tmm.0.shape.row1 = getelementptr i8, i8* %16, i64 48
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%17 = getelementptr i8, i8* %16, i64 16
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%amx.tmm.0.shape.col2 = bitcast i8* %17 to i16*
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%18 = trunc i16 %row to i8
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store volatile i8 %18, i8* %amx.tmm.0.shape.row1, align 1
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store volatile i16 8, i16* %amx.tmm.0.shape.col2, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %16)
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%19 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 %row, i16 8, i8* %13, i64 64, x86_amx %19)
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%20 = bitcast <16 x i32>* %2 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %2, align 64
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%amx.tmm.0.shape.row9 = getelementptr i8, i8* %20, i64 48
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%21 = getelementptr i8, i8* %20, i64 16
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%amx.tmm.0.shape.col10 = bitcast i8* %21 to i16*
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%22 = trunc i16 8 to i8
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store volatile i8 %22, i8* %amx.tmm.0.shape.row9, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col10, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %20)
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%23 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 8, i16 %col, i8* %11, i64 64, x86_amx %23)
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%24 = bitcast <16 x i32>* %3 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %3, align 64
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%amx.tmm.0.shape.row7 = getelementptr i8, i8* %24, i64 48
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%25 = getelementptr i8, i8* %24, i64 16
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%amx.tmm.0.shape.col8 = bitcast i8* %25 to i16*
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%26 = trunc i16 %row to i8
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store volatile i8 %26, i8* %amx.tmm.0.shape.row7, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col8, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %24)
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%27 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, i8* %9, i64 64, x86_amx %27)
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br label %if.end
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if.else: ; preds = %entry
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%28 = bitcast <16 x i32>* %1 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %1, align 64
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%amx.tmm.0.shape.row11 = getelementptr i8, i8* %28, i64 48
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%29 = getelementptr i8, i8* %28, i64 16
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%amx.tmm.0.shape.col12 = bitcast i8* %29 to i16*
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%30 = trunc i16 %row to i8
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store volatile i8 %30, i8* %amx.tmm.0.shape.row11, align 1
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store volatile i16 8, i16* %amx.tmm.0.shape.col12, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %28)
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%31 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 %row, i16 8, i8* %13, i64 64, x86_amx %31)
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%32 = bitcast <16 x i32>* %7 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %7, align 64
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%amx.tmm.0.shape.row = getelementptr i8, i8* %32, i64 48
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%33 = getelementptr i8, i8* %32, i64 16
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%amx.tmm.0.shape.col = bitcast i8* %33 to i16*
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%34 = trunc i16 8 to i8
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store volatile i8 %34, i8* %amx.tmm.0.shape.row, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %32)
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%35 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 8, i16 %col, i8* %11, i64 64, x86_amx %35)
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%36 = bitcast <16 x i32>* %0 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %0, align 64
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%amx.tmm.0.shape.row13 = getelementptr i8, i8* %36, i64 48
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%37 = getelementptr i8, i8* %36, i64 16
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%amx.tmm.0.shape.col14 = bitcast i8* %37 to i16*
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%38 = trunc i16 %row to i8
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store volatile i8 %38, i8* %amx.tmm.0.shape.row13, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col14, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %36)
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%39 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32)
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call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, i8* %9, i64 64, x86_amx %39)
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%40 = bitcast <16 x i32>* %4 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %4, align 64
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%amx.tmm.0.shape.row5 = getelementptr i8, i8* %40, i64 48
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%41 = getelementptr i8, i8* %40, i64 16
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%amx.tmm.0.shape.col6 = bitcast i8* %41 to i16*
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%42 = trunc i16 %row to i8
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store volatile i8 %42, i8* %amx.tmm.0.shape.row5, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col6, align 2
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%amx.tmm.1.shape.row = getelementptr i8, i8* %40, i64 49
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%43 = getelementptr i8, i8* %40, i64 18
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%amx.tmm.1.shape.col = bitcast i8* %43 to i16*
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%44 = trunc i16 %row to i8
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store volatile i8 %44, i8* %amx.tmm.1.shape.row, align 1
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store volatile i16 8, i16* %amx.tmm.1.shape.col, align 2
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%amx.tmm.2.shape.row = getelementptr i8, i8* %40, i64 50
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%45 = getelementptr i8, i8* %40, i64 20
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%amx.tmm.2.shape.col = bitcast i8* %45 to i16*
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%46 = trunc i16 8 to i8
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store volatile i8 %46, i8* %amx.tmm.2.shape.row, align 1
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store volatile i16 %col, i16* %amx.tmm.2.shape.col, align 2
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%amx.tmm.3.shape.row = getelementptr i8, i8* %40, i64 51
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%47 = getelementptr i8, i8* %40, i64 22
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%amx.tmm.3.shape.col = bitcast i8* %47 to i16*
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%48 = trunc i16 %row to i8
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store volatile i8 %48, i8* %amx.tmm.3.shape.row, align 1
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store volatile i16 %col, i16* %amx.tmm.3.shape.col, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %40)
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%49 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 8, i8* %13, i64 64)
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%50 = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, i8* %11, i64 64)
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%51 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* %9, i64 64)
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%52 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %row, i16 %col, i16 8, x86_amx %51, x86_amx %49, x86_amx %50)
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call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, i8* %15, i64 64, x86_amx %52)
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%53 = bitcast <16 x i32>* %5 to i8*
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store <16 x i32> zeroinitializer, <16 x i32>* %5, align 64
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%amx.tmm.0.shape.row3 = getelementptr i8, i8* %53, i64 48
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%54 = getelementptr i8, i8* %53, i64 16
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%amx.tmm.0.shape.col4 = bitcast i8* %54 to i16*
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%55 = trunc i16 %row to i8
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store volatile i8 %55, i8* %amx.tmm.0.shape.row3, align 1
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store volatile i16 %col, i16* %amx.tmm.0.shape.col4, align 2
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call void @llvm.x86.ldtilecfg.internal(i8* %53)
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%56 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* %15, i64 64)
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tail call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32, x86_amx %56)
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ret void
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}
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; Function Attrs: nounwind
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declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64) #1
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; Function Attrs: nounwind
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declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx) #1
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; Function Attrs: nounwind
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declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx) #1
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; Function Attrs: nounwind
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declare void @llvm.x86.ldtilecfg.internal(i8*) #2
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attributes #0 = { "target-features"="+amx-int8,+avx512f" }
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attributes #1 = { nounwind "target-features"="+amx-int8,+avx512f" }
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attributes #2 = { nounwind }
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...
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---
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name: test_api
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alignment: 16
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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registers: []
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liveins:
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- { reg: '$edi', virtual-reg: '' }
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- { reg: '$esi', virtual-reg: '' }
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- { reg: '$edx', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1024
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack:
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- { id: 0, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 1, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 2, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 3, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 4, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 5, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 6, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 7, name: '', type: default, offset: 0, size: 64, alignment: 16,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 8, name: '', type: default, offset: 0, size: 1024, alignment: 1024,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 9, name: '', type: default, offset: 0, size: 1024, alignment: 1024,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 10, name: '', type: default, offset: 0, size: 1024, alignment: 1024,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 11, name: '', type: default, offset: 0, size: 1024, alignment: 1024,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 12, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 13, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 14, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 15, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 16, name: '', type: spill-slot, offset: 0, size: 2, alignment: 2,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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- { id: 17, name: '', type: spill-slot, offset: 0, size: 2, alignment: 2,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo: {}
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body: |
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bb.0.entry:
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successors: %bb.2(0x40000000), %bb.1(0x40000000)
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liveins: $edi, $esi, $edx
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renamable $ax = COPY renamable $dx, implicit killed $edx
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MOV16mr %stack.17, 1, $noreg, 0, $noreg, killed $ax :: (store 2 into %stack.17)
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renamable $ax = COPY renamable $si, implicit killed $esi
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MOV16mr %stack.16, 1, $noreg, 0, $noreg, killed $ax :: (store 2 into %stack.16)
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renamable $rax = LEA64r %stack.8, 1, $noreg, 0, $noreg
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MOV64mr %stack.15, 1, $noreg, 0, $noreg, killed $rax :: (store 8 into %stack.15)
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renamable $rax = LEA64r %stack.9, 1, $noreg, 0, $noreg
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MOV64mr %stack.14, 1, $noreg, 0, $noreg, killed $rax :: (store 8 into %stack.14)
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renamable $rax = LEA64r %stack.10, 1, $noreg, 0, $noreg
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MOV64mr %stack.13, 1, $noreg, 0, $noreg, killed $rax :: (store 8 into %stack.13)
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renamable $rax = LEA64r %stack.11, 1, $noreg, 0, $noreg
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MOV64mr %stack.12, 1, $noreg, 0, $noreg, killed $rax :: (store 8 into %stack.12)
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CMP32ri8 killed renamable $edi, 0, implicit-def $eflags
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JCC_1 %bb.2, 4, implicit killed $eflags
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||||
|
||||
bb.1.if.then:
|
||||
successors: %bb.3(0x80000000)
|
||||
; CHECK-LABEL: bb.1.if.then
|
||||
; tmm0 --> row_offset = 48, col_offset = 16
|
||||
; CHECK: MOV8mr %stack.6, 1, $noreg, 48, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row1)
|
||||
; CHECK: MOV16mi %stack.6, 1, $noreg, 16, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.0.shape.col2)
|
||||
; CHECK: PLDTILECFGV %stack.6, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $si, renamable $r9, 1, renamable $r10, 0, $noreg
|
||||
; CHECK: PTILESTOREDV renamable $ax, renamable $si, renamable $r11, 1, renamable $r8, 0, $noreg, killed renamable $tmm0
|
||||
|
||||
; tmm1 --> row_offset = 49, col_offset = 18
|
||||
; CHECK: MOV8mi %stack.2, 1, $noreg, 49, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.0.shape.row9)
|
||||
; CHECK: MOV16mr %stack.2, 1, $noreg, 18, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col10)
|
||||
; CHECK: PLDTILECFGV %stack.2, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm1 = PTILELOADDV renamable $si, renamable $cx, killed renamable $r9, 1, killed renamable $r10, 0, $noreg
|
||||
; CHECK: PTILESTOREDV killed renamable $si, renamable $cx, renamable $rdi, 1, killed renamable $r8, 0, $noreg, killed renamable $tmm1
|
||||
|
||||
; tmm2 --> row_offset = 50, col_offset = 20
|
||||
; CHECK: MOV8mr %stack.3, 1, $noreg, 50, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row7)
|
||||
; CHECK: MOV16mr %stack.3, 1, $noreg, 20, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col8)
|
||||
; CHECK: PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm2 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rsi, 1, killed renamable $rdi, 0, $noreg
|
||||
; CHECK: PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm2
|
||||
|
||||
$ax = MOV16rm %stack.16, 1, $noreg, 0, $noreg :: (load 2 from %stack.16)
|
||||
$cx = MOV16rm %stack.17, 1, $noreg, 0, $noreg :: (load 2 from %stack.17)
|
||||
$rdx = MOV64rm %stack.15, 1, $noreg, 0, $noreg :: (load 8 from %stack.15)
|
||||
$rdi = MOV64rm %stack.14, 1, $noreg, 0, $noreg :: (load 8 from %stack.14)
|
||||
$r11 = MOV64rm %stack.13, 1, $noreg, 0, $noreg :: (load 8 from %stack.13)
|
||||
renamable $zmm0 = AVX512_512_SET0
|
||||
VMOVDQA64Zmr %stack.6, 1, $noreg, 0, $noreg, renamable $zmm0 :: (store 64 into %ir.6)
|
||||
renamable $sil = COPY renamable $al
|
||||
MOV8mr %stack.6, 1, $noreg, 48, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row1)
|
||||
MOV16mi %stack.6, 1, $noreg, 16, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.0.shape.col2)
|
||||
PLDTILECFGV %stack.6, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $r9 = MOV32ri64 @buf
|
||||
renamable $r10 = MOV32ri64 32
|
||||
renamable $si = MOV16ri 8
|
||||
renamable $tmm0 = PTILELOADDV renamable $ax, renamable $si, renamable $r9, 1, renamable $r10, 0, $noreg
|
||||
renamable $r8 = MOV32ri64 64
|
||||
PTILESTOREDV renamable $ax, renamable $si, renamable $r11, 1, renamable $r8, 0, $noreg, killed renamable $tmm0
|
||||
VMOVDQA64Zmr %stack.2, 1, $noreg, 0, $noreg, renamable $zmm0 :: (store 64 into %ir.2)
|
||||
MOV8mi %stack.2, 1, $noreg, 48, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.0.shape.row9)
|
||||
MOV16mr %stack.2, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col10)
|
||||
PLDTILECFGV %stack.2, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $tmm1 = PTILELOADDV renamable $si, renamable $cx, killed renamable $r9, 1, killed renamable $r10, 0, $noreg
|
||||
PTILESTOREDV killed renamable $si, renamable $cx, renamable $rdi, 1, killed renamable $r8, 0, $noreg, killed renamable $tmm1
|
||||
renamable $rsi = LEA64r %stack.3, 1, $noreg, 0, $noreg
|
||||
VMOVDQA64Zmr %stack.3, 1, $noreg, 0, $noreg, killed renamable $zmm0 :: (store 64 into %ir.3)
|
||||
renamable $dil = COPY renamable $al
|
||||
MOV8mr %stack.3, 1, $noreg, 48, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row7)
|
||||
MOV16mr %stack.3, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col8)
|
||||
PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $rsi = MOV32ri64 @buf
|
||||
renamable $rdi = MOV32ri64 32
|
||||
renamable $tmm2 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rsi, 1, killed renamable $rdi, 0, $noreg
|
||||
renamable $rsi = MOV32ri64 64
|
||||
PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm2
|
||||
JMP_1 %bb.3
|
||||
|
||||
bb.2.if.else:
|
||||
successors: %bb.3(0x80000000)
|
||||
|
||||
; CHECK-LABEL: bb.2.if.else
|
||||
; tmm3 --> row_offset = 51, col_offset = 22
|
||||
; CHECK: MOV8mr %stack.1, 1, $noreg, 51, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row11)
|
||||
; CHECK: MOV16mi %stack.1, 1, $noreg, 22, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.0.shape.col12)
|
||||
; CHECK: PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm3 = PTILELOADDV renamable $ax, renamable $si, renamable $r9, 1, renamable $r10, 0, $noreg
|
||||
; CHECK: PTILESTOREDV renamable $ax, renamable $si, renamable $r11, 1, renamable $r8, 0, $noreg, killed renamable $tmm3
|
||||
|
||||
; tmm4 --> row_offset = 52, col_offset = 24
|
||||
; CHECK: MOV8mi %stack.7, 1, $noreg, 52, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.0.shape.row)
|
||||
; CHECK: MOV16mr %stack.7, 1, $noreg, 24, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col)
|
||||
; CHECK: PLDTILECFGV %stack.7, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm4 = PTILELOADDV renamable $si, renamable $cx, killed renamable $r9, 1, killed renamable $r10, 0, $noreg
|
||||
; CHECK: PTILESTOREDV killed renamable $si, renamable $cx, renamable $rdi, 1, killed renamable $r8, 0, $noreg, killed renamable $tmm4
|
||||
|
||||
; tmm4 --> row_offset = 53, col_offset = 26
|
||||
; CHECK: MOV8mr %stack.0, 1, $noreg, 53, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row13)
|
||||
; CHECK: MOV16mr %stack.0, 1, $noreg, 26, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col14)
|
||||
; CHECK: PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm5 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rsi, 1, killed renamable $rdi, 0, $noreg
|
||||
; CHECK: PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm5
|
||||
|
||||
$ax = MOV16rm %stack.16, 1, $noreg, 0, $noreg :: (load 2 from %stack.16)
|
||||
$cx = MOV16rm %stack.17, 1, $noreg, 0, $noreg :: (load 2 from %stack.17)
|
||||
$rdx = MOV64rm %stack.15, 1, $noreg, 0, $noreg :: (load 8 from %stack.15)
|
||||
$rdi = MOV64rm %stack.14, 1, $noreg, 0, $noreg :: (load 8 from %stack.14)
|
||||
$r11 = MOV64rm %stack.13, 1, $noreg, 0, $noreg :: (load 8 from %stack.13)
|
||||
renamable $zmm0 = AVX512_512_SET0
|
||||
VMOVDQA64Zmr %stack.1, 1, $noreg, 0, $noreg, renamable $zmm0 :: (store 64 into %ir.1)
|
||||
renamable $sil = COPY renamable $al
|
||||
MOV8mr %stack.1, 1, $noreg, 48, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row11)
|
||||
MOV16mi %stack.1, 1, $noreg, 16, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.0.shape.col12)
|
||||
PLDTILECFGV %stack.1, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $r9 = MOV32ri64 @buf2
|
||||
renamable $r10 = MOV32ri64 32
|
||||
renamable $si = MOV16ri 8
|
||||
renamable $tmm3 = PTILELOADDV renamable $ax, renamable $si, renamable $r9, 1, renamable $r10, 0, $noreg
|
||||
renamable $r8 = MOV32ri64 64
|
||||
PTILESTOREDV renamable $ax, renamable $si, renamable $r11, 1, renamable $r8, 0, $noreg, killed renamable $tmm3
|
||||
VMOVDQA64Zmr %stack.7, 1, $noreg, 0, $noreg, renamable $zmm0 :: (store 64 into %ir.7)
|
||||
MOV8mi %stack.7, 1, $noreg, 48, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.0.shape.row)
|
||||
MOV16mr %stack.7, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col)
|
||||
PLDTILECFGV %stack.7, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $tmm4 = PTILELOADDV renamable $si, renamable $cx, killed renamable $r9, 1, killed renamable $r10, 0, $noreg
|
||||
PTILESTOREDV killed renamable $si, renamable $cx, renamable $rdi, 1, killed renamable $r8, 0, $noreg, killed renamable $tmm4
|
||||
renamable $rsi = LEA64r %stack.0, 1, $noreg, 0, $noreg
|
||||
VMOVDQA64Zmr %stack.0, 1, $noreg, 0, $noreg, killed renamable $zmm0 :: (store 64 into %ir.0)
|
||||
renamable $dil = COPY renamable $al
|
||||
MOV8mr %stack.0, 1, $noreg, 48, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row13)
|
||||
MOV16mr %stack.0, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col14)
|
||||
PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $rsi = MOV32ri64 @buf2
|
||||
renamable $rdi = MOV32ri64 32
|
||||
renamable $tmm5 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rsi, 1, killed renamable $rdi, 0, $noreg
|
||||
renamable $rsi = MOV32ri64 64
|
||||
PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm5
|
||||
|
||||
bb.3.if.end:
|
||||
; CHECK-LABEL: bb.3.if.end
|
||||
; tmm0 --> row_offset = 48, col_offset = 16
|
||||
; tmm1 --> row_offset = 49, col_offset = 18
|
||||
; tmm2 --> row_offset = 50, col_offset = 20
|
||||
; CHECK: MOV8mr %stack.4, 1, $noreg, 48, $noreg, renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row5)
|
||||
; CHECK: MOV16mr %stack.4, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col6)
|
||||
; CHECK: MOV8mr %stack.4, 1, $noreg, 49, $noreg, renamable $sil :: (volatile store 1 into %ir.amx.tmm.1.shape.row)
|
||||
; CHECK: MOV16mi %stack.4, 1, $noreg, 18, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.1.shape.col)
|
||||
; CHECK: MOV8mi %stack.4, 1, $noreg, 50, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.2.shape.row)
|
||||
; CHECK: MOV16mr %stack.4, 1, $noreg, 20, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.2.shape.col)
|
||||
; CHECK: MOV8mr %stack.4, 1, $noreg, 48, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.3.shape.row)
|
||||
; CHECK: MOV16mr %stack.4, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.3.shape.col)
|
||||
; CHECK: PLDTILECFGV %stack.4, 1, $noreg, 0, $noreg, implicit-def dead $tmm0
|
||||
; CHECK: renamable $tmm1 = PTILELOADDV renamable $ax, renamable $di, killed renamable $r10, 1, renamable $rsi, 0, $noreg
|
||||
; CHECK: renamable $tmm2 = PTILELOADDV renamable $di, renamable $cx, killed renamable $r9, 1, renamable $rsi, 0, $noreg
|
||||
; CHECK: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $r8, 1, renamable $rsi, 0, $noreg
|
||||
; CHECK: renamable $tmm0 = PTDPBSSDV renamable $ax, renamable $cx, killed renamable $di, renamable $tmm0, killed renamable $tmm1, killed renamable $tmm2
|
||||
; CHECK: PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0
|
||||
|
||||
; tmm6 --> row_offset = 54, col_offset = 28
|
||||
; CHECK: MOV8mr %stack.5, 1, $noreg, 54, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row3)
|
||||
; CHECK: MOV16mr %stack.5, 1, $noreg, 28, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col4)
|
||||
; CHECK: PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg
|
||||
; CHECK: renamable $tmm6 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
|
||||
; CHECK: PTILESTOREDV killed renamable $ax, killed renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm6
|
||||
|
||||
$ax = MOV16rm %stack.16, 1, $noreg, 0, $noreg :: (load 2 from %stack.16)
|
||||
$cx = MOV16rm %stack.17, 1, $noreg, 0, $noreg :: (load 2 from %stack.17)
|
||||
$rdx = MOV64rm %stack.12, 1, $noreg, 0, $noreg :: (load 8 from %stack.12)
|
||||
$r8 = MOV64rm %stack.15, 1, $noreg, 0, $noreg :: (load 8 from %stack.15)
|
||||
$r9 = MOV64rm %stack.14, 1, $noreg, 0, $noreg :: (load 8 from %stack.14)
|
||||
$r10 = MOV64rm %stack.13, 1, $noreg, 0, $noreg :: (load 8 from %stack.13)
|
||||
renamable $zmm0 = AVX512_512_SET0
|
||||
VMOVDQA64Zmr %stack.4, 1, $noreg, 0, $noreg, renamable $zmm0 :: (store 64 into %ir.4)
|
||||
renamable $sil = COPY renamable $al
|
||||
MOV8mr %stack.4, 1, $noreg, 48, $noreg, renamable $sil :: (volatile store 1 into %ir.amx.tmm.0.shape.row5)
|
||||
MOV16mr %stack.4, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col6)
|
||||
MOV8mr %stack.4, 1, $noreg, 49, $noreg, renamable $sil :: (volatile store 1 into %ir.amx.tmm.1.shape.row)
|
||||
MOV16mi %stack.4, 1, $noreg, 18, $noreg, 8 :: (volatile store 2 into %ir.amx.tmm.1.shape.col)
|
||||
MOV8mi %stack.4, 1, $noreg, 50, $noreg, 8 :: (volatile store 1 into %ir.amx.tmm.2.shape.row)
|
||||
MOV16mr %stack.4, 1, $noreg, 20, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.2.shape.col)
|
||||
MOV8mr %stack.4, 1, $noreg, 51, $noreg, killed renamable $sil :: (volatile store 1 into %ir.amx.tmm.3.shape.row)
|
||||
MOV16mr %stack.4, 1, $noreg, 22, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.3.shape.col)
|
||||
PLDTILECFGV %stack.4, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $rsi = MOV32ri64 64
|
||||
renamable $di = MOV16ri 8
|
||||
renamable $tmm1 = PTILELOADDV renamable $ax, renamable $di, killed renamable $r10, 1, renamable $rsi, 0, $noreg
|
||||
renamable $tmm2 = PTILELOADDV renamable $di, renamable $cx, killed renamable $r9, 1, renamable $rsi, 0, $noreg
|
||||
renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $r8, 1, renamable $rsi, 0, $noreg
|
||||
renamable $tmm0 = PTDPBSSDV renamable $ax, renamable $cx, killed renamable $di, renamable $tmm0, killed renamable $tmm1, killed renamable $tmm2
|
||||
PTILESTOREDV renamable $ax, renamable $cx, renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0
|
||||
renamable $rsi = LEA64r %stack.5, 1, $noreg, 0, $noreg
|
||||
VMOVDQA64Zmr %stack.5, 1, $noreg, 0, $noreg, killed renamable $zmm0 :: (store 64 into %ir.5)
|
||||
renamable $dil = COPY renamable $al
|
||||
MOV8mr %stack.5, 1, $noreg, 48, $noreg, killed renamable $dil :: (volatile store 1 into %ir.amx.tmm.0.shape.row3)
|
||||
MOV16mr %stack.5, 1, $noreg, 16, $noreg, renamable $cx :: (volatile store 2 into %ir.amx.tmm.0.shape.col4)
|
||||
PLDTILECFGV killed renamable $rsi, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7
|
||||
renamable $rsi = MOV32ri64 64
|
||||
renamable $tmm6 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
|
||||
renamable $rdx = MOV32ri64 @buf
|
||||
renamable $rsi = MOV32ri64 32
|
||||
PTILESTOREDV killed renamable $ax, killed renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm6
|
||||
RETQ
|
||||
|
||||
...
|
||||
Loading…
Reference in New Issue