forked from OSchip/llvm-project
Expand fcopysign to the bitwise sequence if select is marked as expensive.
llvm-svn: 32940
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@ -2354,11 +2354,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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break;
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case TargetLowering::Legal: break;
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case TargetLowering::Expand: {
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// If this target supports fabs/fneg natively, do this efficiently.
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if (TLI.getOperationAction(ISD::FABS, Tmp1.getValueType()) ==
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TargetLowering::Legal &&
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// If this target supports fabs/fneg natively and select is cheap,
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// do this efficiently.
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if (!TLI.isSelectExpensive() &&
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TLI.getOperationAction(ISD::FABS, Tmp1.getValueType()) ==
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TargetLowering::Legal &&
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TLI.getOperationAction(ISD::FNEG, Tmp1.getValueType()) ==
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TargetLowering::Legal) {
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TargetLowering::Legal) {
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// Get the sign bit of the RHS.
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MVT::ValueType IVT =
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Tmp2.getValueType() == MVT::f32 ? MVT::i32 : MVT::i64;
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