forked from OSchip/llvm-project
[VectorCombine] add more tests for extract-extract patterns; NFC
This commit is contained in:
Sanjay Patel
parent
fa0320dd8d
commit
5eeea337be
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@ -415,3 +415,71 @@ define float @ext14_ext15_fmul_v16f32(<16 x float> %x) {
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%r = fadd float %e0, %e1
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ret float %r
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}
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define <4 x float> @ins_bo_ext_ext(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @ins_bo_ext_ext(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[A]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 2
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; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[B:%.*]], float [[TMP3]], i32 3
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; CHECK-NEXT: ret <4 x float> [[V3]]
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;
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%a2 = extractelement <4 x float> %a, i32 2
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%a3 = extractelement <4 x float> %a, i32 3
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%a23 = fadd float %a2, %a3
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%v3 = insertelement <4 x float> %b, float %a23, i32 3
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ret <4 x float> %v3
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}
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define <4 x float> @ins_bo_ext_ext_uses(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @ins_bo_ext_ext_uses(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[A]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 2
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; CHECK-NEXT: call void @use_f32(float [[TMP3]])
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; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[B:%.*]], float [[TMP3]], i32 3
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; CHECK-NEXT: ret <4 x float> [[V3]]
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;
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%a2 = extractelement <4 x float> %a, i32 2
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%a3 = extractelement <4 x float> %a, i32 3
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%a23 = fadd float %a2, %a3
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call void @use_f32(float %a23)
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%v3 = insertelement <4 x float> %b, float %a23, i32 3
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ret <4 x float> %v3
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}
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define <4 x float> @PR34724(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: @PR34724(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x float> [[B:%.*]], <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[B]], <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = fadd <4 x float> [[A]], [[TMP1]]
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; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP4]], i32 2
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; CHECK-NEXT: [[TMP6:%.*]] = fadd <4 x float> [[B]], [[TMP2]]
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; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[TMP6]], i32 0
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; CHECK-NEXT: [[TMP8:%.*]] = fadd <4 x float> [[B]], [[TMP3]]
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; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x float> [[TMP8]], i32 2
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; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> undef, float [[TMP5]], i32 1
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; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[TMP7]], i32 2
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; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[TMP9]], i32 3
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; CHECK-NEXT: ret <4 x float> [[V3]]
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;
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%a0 = extractelement <4 x float> %a, i32 0
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%a1 = extractelement <4 x float> %a, i32 1
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%a2 = extractelement <4 x float> %a, i32 2
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%a3 = extractelement <4 x float> %a, i32 3
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%b0 = extractelement <4 x float> %b, i32 0
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%b1 = extractelement <4 x float> %b, i32 1
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%b2 = extractelement <4 x float> %b, i32 2
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%b3 = extractelement <4 x float> %b, i32 3
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%a23 = fadd float %a2, %a3
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%b01 = fadd float %b0, %b1
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%b23 = fadd float %b2, %b3
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%v1 = insertelement <4 x float> undef, float %a23, i32 1
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%v2 = insertelement <4 x float> %v1, float %b01, i32 2
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%v3 = insertelement <4 x float> %v2, float %b23, i32 3
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ret <4 x float> %v3
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}
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@ -151,3 +151,40 @@ define i1 @cmp12_v4i32(<4 x i32> %x, <4 x i32> %y) {
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%cmp = icmp sgt i32 %x1, %y2
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ret i1 %cmp
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}
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define <4 x i1> @ins_fcmp_ext_ext(<4 x float> %a, <4 x i1> %b) {
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; SSE-LABEL: @ins_fcmp_ext_ext(
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; SSE-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A:%.*]], i32 1
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; SSE-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A]], i32 2
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; SSE-NEXT: [[A21:%.*]] = fcmp ugt float [[A2]], [[A1]]
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; SSE-NEXT: [[R:%.*]] = insertelement <4 x i1> [[B:%.*]], i1 [[A21]], i32 2
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; SSE-NEXT: ret <4 x i1> [[R]]
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;
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; AVX-LABEL: @ins_fcmp_ext_ext(
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; AVX-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[A:%.*]], <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 undef, i32 undef>
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; AVX-NEXT: [[TMP2:%.*]] = fcmp ugt <4 x float> [[TMP1]], [[A]]
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; AVX-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i64 1
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; AVX-NEXT: [[R:%.*]] = insertelement <4 x i1> [[B:%.*]], i1 [[TMP3]], i32 2
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; AVX-NEXT: ret <4 x i1> [[R]]
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;
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%a1 = extractelement <4 x float> %a, i32 1
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%a2 = extractelement <4 x float> %a, i32 2
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%a21 = fcmp ugt float %a2, %a1
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%r = insertelement <4 x i1> %b, i1 %a21, i32 2
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ret <4 x i1> %r
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}
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define <4 x i1> @ins_icmp_ext_ext(<4 x i32> %a, <4 x i1> %b) {
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; CHECK-LABEL: @ins_icmp_ext_ext(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
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; CHECK-NEXT: [[TMP2:%.*]] = icmp ule <4 x i32> [[A]], [[TMP1]]
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i1> [[TMP2]], i32 2
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; CHECK-NEXT: [[R:%.*]] = insertelement <4 x i1> [[B:%.*]], i1 [[TMP3]], i32 3
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; CHECK-NEXT: ret <4 x i1> [[R]]
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;
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%a3 = extractelement <4 x i32> %a, i32 3
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%a2 = extractelement <4 x i32> %a, i32 2
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%a23 = icmp ule i32 %a2, %a3
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%r = insertelement <4 x i1> %b, i1 %a23, i32 3
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ret <4 x i1> %r
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}
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