forked from OSchip/llvm-project
[msan] Raise alignment of origin stores/loads when possible.
Origin alignment is as high as the alignment of the corresponding application location, but never less than 4. llvm-svn: 171110
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@ -100,7 +100,8 @@ static const uint64_t kShadowMask32 = 1ULL << 31;
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static const uint64_t kShadowMask64 = 1ULL << 46;
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static const uint64_t kOriginOffset32 = 1ULL << 30;
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static const uint64_t kOriginOffset64 = 1ULL << 45;
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static const uint64_t kShadowTLSAlignment = 8;
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static const unsigned kMinOriginAlignment = 4;
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static const unsigned kShadowTLSAlignment = 8;
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/// \brief Track origins of uninitialized values.
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///
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@ -451,8 +452,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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insertCheck(Addr, &I);
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if (MS.TrackOrigins) {
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unsigned Alignment = std::max(kMinOriginAlignment, I.getAlignment());
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if (ClStoreCleanOrigin || isa<StructType>(Shadow->getType())) {
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IRB.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRB));
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IRB.CreateAlignedStore(getOrigin(Val), getOriginPtr(Addr, IRB),
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Alignment);
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} else {
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Value *ConvertedShadow = convertToShadowTyNoVec(Shadow, IRB);
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@ -469,7 +472,8 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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SplitBlockAndInsertIfThen(cast<Instruction>(Cmp), false,
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MS.OriginStoreWeights);
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IRBuilder<> IRBNew(CheckTerm);
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IRBNew.CreateStore(getOrigin(Val), getOriginPtr(Addr, IRBNew));
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IRBNew.CreateAlignedStore(getOrigin(Val), getOriginPtr(Addr, IRBNew),
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Alignment);
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}
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}
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}
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@ -827,8 +831,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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if (ClCheckAccessAddress)
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insertCheck(I.getPointerOperand(), &I);
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if (MS.TrackOrigins)
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setOrigin(&I, IRB.CreateLoad(getOriginPtr(Addr, IRB)));
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if (MS.TrackOrigins) {
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unsigned Alignment = std::max(kMinOriginAlignment, I.getAlignment());
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setOrigin(&I, IRB.CreateAlignedLoad(getOriginPtr(Addr, IRB), Alignment));
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}
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}
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/// \brief Instrument StoreInst
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@ -56,7 +56,7 @@ entry:
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; CHECK-ORIGINS: icmp
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; CHECK-ORIGINS: br i1
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS-NOT: store {{.*}} align
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; CHECK-ORIGINS: store {{.*}} align 32
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; CHECK-ORIGINS: br label
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; CHECK-ORIGINS: <label>
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; CHECK-ORIGINS: store {{.*}} align 32
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@ -362,7 +362,8 @@ define zeroext i1 @ICmpSLE(i32 %x) nounwind uwtable readnone {
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; CHECK: ret i1
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; Check that loads from shadow have the same aligment as the original loads.
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; Check that loads of shadow have the same aligment as the original loads.
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; Check that loads of origin have the aligment of max(4, original alignment).
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define i32 @ShadowLoadAlignmentLarge() nounwind uwtable {
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%y = alloca i32, align 64
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@ -386,6 +387,12 @@ define i32 @ShadowLoadAlignmentSmall() nounwind uwtable {
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; CHECK: load volatile i32* {{.*}} align 2
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; CHECK: ret i32
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; CHECK-ORIGINS: @ShadowLoadAlignmentSmall
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; CHECK-ORIGINS: load i32* {{.*}} align 2
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; CHECK-ORIGINS: load i32* {{.*}} align 4
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; CHECK-ORIGINS: load volatile i32* {{.*}} align 2
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; CHECK-ORIGINS: ret i32
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; Test vector manipulation instructions.
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; Check that the same bit manipulation is applied to the shadow values.
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