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[InstSimplify] generalize ctlz-of-shifted-constant 

https://alive2.llvm.org/ce/z/zWL_VQ
This commit is contained in:
Sanjay Patel 2021-04-21 14:13:30 -04:00
parent 859e1f420d
commit 5e6dc5e404
2 changed files with 11 additions and 19 deletions
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4
llvm/lib/Analysis/InstructionSimplify.cpp
View File

@ -5477,8 +5477,10 @@ static Value *simplifyBinaryIntrinsic(Function *F, Value *Op0, Value *Op1,
}
case Intrinsic::ctlz: {
Value *X;
if (match(Op0, m_LShr(m_SignMask(), m_Value(X))))
if (match(Op0, m_LShr(m_Negative(), m_Value(X))))
return X;
if (match(Op0, m_AShr(m_Negative(), m_Value())))
return Constant::getNullValue(ReturnType);
break;
}
case Intrinsic::smax:

26
llvm/test/Transforms/InstSimplify/call.ll
View File

@ -1408,9 +1408,7 @@ define i32 @ctlz_lshr_sign_bit(i32 %x) {
define i32 @ctlz_lshr_negative(i32 %x) {
; CHECK-LABEL: @ctlz_lshr_negative(
; CHECK-NEXT: [[S:%.*]] = lshr i32 -42, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
; CHECK-NEXT: ret i32 [[X:%.*]]
;
%s = lshr i32 -42, %x
%r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
@ -1428,24 +1426,20 @@ define <3 x i33> @ctlz_lshr_sign_bit_vec(<3 x i33> %x) {
; Negative test - this could be generalized in instcombine though.
define i32 @ctlz_lshr_not_sign_bit(i32 %x) {
; CHECK-LABEL: @ctlz_lshr_not_sign_bit(
; CHECK-NEXT: [[S:%.*]] = lshr i32 -1, [[X:%.*]]
define i32 @ctlz_lshr_not_negative(i32 %x) {
; CHECK-LABEL: @ctlz_lshr_not_negative(
; CHECK-NEXT: [[S:%.*]] = lshr i32 42, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%s = lshr i32 4294967295, %x
%s = lshr i32 42, %x
%r = call i32 @llvm.ctlz.i32(i32 %s, i1 true)
ret i32 %r
}
; TODO: Reduce to 0.
define i32 @ctlz_ashr_sign_bit(i32 %x) {
; CHECK-LABEL: @ctlz_ashr_sign_bit(
; CHECK-NEXT: [[S:%.*]] = ashr i32 -2147483648, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
; CHECK-NEXT: ret i32 0
;
%s = ashr i32 2147483648, %x
%r = call i32 @llvm.ctlz.i32(i32 %s, i1 false)
@ -1454,9 +1448,7 @@ define i32 @ctlz_ashr_sign_bit(i32 %x) {
define i32 @ctlz_ashr_negative(i32 %x) {
; CHECK-LABEL: @ctlz_ashr_negative(
; CHECK-NEXT: [[S:%.*]] = ashr i32 -42, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
; CHECK-NEXT: ret i32 0
;
%s = ashr i32 -42, %x
%r = call i32 @llvm.ctlz.i32(i32 %s, i1 false)
@ -1465,9 +1457,7 @@ define i32 @ctlz_ashr_negative(i32 %x) {
define <3 x i33> @ctlz_ashr_sign_bit_vec(<3 x i33> %x) {
; CHECK-LABEL: @ctlz_ashr_sign_bit_vec(
; CHECK-NEXT: [[S:%.*]] = ashr <3 x i33> <i33 -4294967296, i33 undef, i33 -4294967296>, [[X:%.*]]
; CHECK-NEXT: [[R:%.*]] = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> [[S]], i1 true)
; CHECK-NEXT: ret <3 x i33> [[R]]
; CHECK-NEXT: ret <3 x i33> zeroinitializer
;
%s = ashr <3 x i33> <i33 4294967296, i33 undef, i33 4294967296>, %x
%r = call <3 x i33> @llvm.ctlz.v3i33(<3 x i33> %s, i1 true)