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Add a mysteriously missing libcall, FPTOSINT_F80_I32. 

Be nice to 16 bit machines by supporting FP_TO_XINT
expansion for these.

llvm-svn: 53407
This commit is contained in:
Duncan Sands 2008-07-10 15:33:02 +00:00
parent 303524be58
commit 5e6d1402c2
5 changed files with 33 additions and 6 deletions
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1
llvm/include/llvm/CodeGen/RuntimeLibcalls.h
View File

@ -97,6 +97,7 @@ namespace RTLIB {
FPTOSINT_F64_I32,
FPTOSINT_F64_I64,
FPTOSINT_F64_I128,
FPTOSINT_F80_I32,
FPTOSINT_F80_I64,
FPTOSINT_F80_I128,
FPTOSINT_PPCF128_I32,

4
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -3770,6 +3770,10 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
LC = RTLIB::FPTOSINT_F32_I32;
else if (OVT == MVT::f64)
LC = RTLIB::FPTOSINT_F64_I32;
else if (OVT == MVT::f80)
LC = RTLIB::FPTOSINT_F80_I32;
else if (OVT == MVT::ppcf128)
LC = RTLIB::FPTOSINT_PPCF128_I32;
else
assert(0 && "Unexpected i32-to-fp conversion!");
} else if (VT == MVT::i64) {

3
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
View File

@ -536,6 +536,9 @@ SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_SINT(SDNode *N) {
case MVT::f64:
LC = RTLIB::FPTOSINT_F64_I32;
break;
case MVT::f80:
LC = RTLIB::FPTOSINT_F80_I32;
break;
case MVT::ppcf128:
LC = RTLIB::FPTOSINT_PPCF128_I32;
break;

30
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
View File

@ -444,6 +444,7 @@ SDOperand DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) {
return Tmp;
}
//===----------------------------------------------------------------------===//
// Integer Operand Promotion
//===----------------------------------------------------------------------===//
@ -995,7 +996,17 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_SINT(SDNode *N, SDOperand &Lo,
MVT VT = N->getValueType(0);
SDOperand Op = N->getOperand(0);
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
if (VT == MVT::i64) {
if (VT == MVT::i32) {
if (Op.getValueType() == MVT::f32)
LC = RTLIB::FPTOSINT_F32_I32;
else if (Op.getValueType() == MVT::f64)
LC = RTLIB::FPTOSINT_F64_I32;
else if (Op.getValueType() == MVT::f80)
LC = RTLIB::FPTOSINT_F80_I32;
else if (Op.getValueType() == MVT::ppcf128)
LC = RTLIB::FPTOSINT_PPCF128_I32;
} else if (VT == MVT::i64) {
if (Op.getValueType() == MVT::f32)
LC = RTLIB::FPTOSINT_F32_I64;
else if (Op.getValueType() == MVT::f64)
@ -1013,9 +1024,8 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_SINT(SDNode *N, SDOperand &Lo,
LC = RTLIB::FPTOSINT_F80_I128;
else if (Op.getValueType() == MVT::ppcf128)
LC = RTLIB::FPTOSINT_PPCF128_I128;
} else {
assert(0 && "Unexpected fp-to-sint conversion!");
}
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fp-to-sint conversion!");
SplitInteger(MakeLibCall(LC, VT, &Op, 1, true/*sign irrelevant*/), Lo, Hi);
}
@ -1024,7 +1034,16 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDOperand &Lo,
MVT VT = N->getValueType(0);
SDOperand Op = N->getOperand(0);
RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
if (VT == MVT::i64) {
if (VT == MVT::i32) {
if (Op.getValueType() == MVT::f32)
LC = RTLIB::FPTOUINT_F32_I32;
else if (Op.getValueType() == MVT::f64)
LC = RTLIB::FPTOUINT_F64_I32;
else if (Op.getValueType() == MVT::f80)
LC = RTLIB::FPTOUINT_F80_I32;
else if (Op.getValueType() == MVT::ppcf128)
LC = RTLIB::FPTOUINT_PPCF128_I32;
} else if (VT == MVT::i64) {
if (Op.getValueType() == MVT::f32)
LC = RTLIB::FPTOUINT_F32_I64;
else if (Op.getValueType() == MVT::f64)
@ -1042,9 +1061,8 @@ void DAGTypeLegalizer::ExpandIntRes_FP_TO_UINT(SDNode *N, SDOperand &Lo,
LC = RTLIB::FPTOUINT_F80_I128;
else if (Op.getValueType() == MVT::ppcf128)
LC = RTLIB::FPTOUINT_PPCF128_I128;
} else {
assert(0 && "Unexpected fp-to-uint conversion!");
}
assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unexpected fp-to-uint conversion!");
SplitInteger(MakeLibCall(LC, VT, &Op, 1, false/*sign irrelevant*/), Lo, Hi);
}

1
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -95,6 +95,7 @@ static void InitLibcallNames(const char **Names) {
Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";