forked from OSchip/llvm-project
AMDGPU: Don't fold undef uses or copies with implicit uses
llvm-svn: 283476
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c59a92387e
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5e63a04e46
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@ -92,11 +92,18 @@ FunctionPass *llvm::createSIFoldOperandsPass() {
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return new SIFoldOperands();
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}
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static bool isSafeToFold(unsigned Opcode) {
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switch(Opcode) {
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static bool isSafeToFold(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case AMDGPU::V_MOV_B32_e32:
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case AMDGPU::V_MOV_B32_e64:
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case AMDGPU::V_MOV_B64_PSEUDO:
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case AMDGPU::V_MOV_B64_PSEUDO: {
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// If there are additional implicit register operands, this may be used for
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// register indexing so the source register operand isn't simply copied.
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unsigned NumOps = MI.getDesc().getNumOperands() +
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MI.getDesc().getNumImplicitUses();
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return MI.getNumOperands() == NumOps;
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}
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case AMDGPU::S_MOV_B32:
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case AMDGPU::S_MOV_B64:
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case AMDGPU::COPY:
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@ -203,6 +210,14 @@ static bool tryAddToFoldList(std::vector<FoldCandidate> &FoldList,
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return true;
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}
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// If the use operand doesn't care about the value, this may be an operand only
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// used for register indexing, in which case it is unsafe to fold.
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static bool isUseSafeToFold(const MachineInstr &MI,
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const MachineOperand &UseMO) {
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return !UseMO.isUndef();
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//return !MI.hasRegisterImplicitUseOperand(UseMO.getReg());
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}
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static void foldOperand(MachineOperand &OpToFold, MachineInstr *UseMI,
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unsigned UseOpIdx,
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std::vector<FoldCandidate> &FoldList,
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@ -211,6 +226,9 @@ static void foldOperand(MachineOperand &OpToFold, MachineInstr *UseMI,
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MachineRegisterInfo &MRI) {
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const MachineOperand &UseOp = UseMI->getOperand(UseOpIdx);
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if (!isUseSafeToFold(*UseMI, UseOp))
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return;
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// FIXME: Fold operands with subregs.
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if (UseOp.isReg() && OpToFold.isReg()) {
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if (UseOp.isImplicit() || UseOp.getSubReg() != AMDGPU::NoSubRegister)
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@ -477,7 +495,7 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
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Next = std::next(I);
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MachineInstr &MI = *I;
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if (!isSafeToFold(MI.getOpcode()))
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if (!isSafeToFold(MI))
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continue;
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unsigned OpSize = TII->getOpSize(MI, 1);
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