forked from OSchip/llvm-project
[X86] Fix some isel patterns to remove an operand from some multiclasses. NFC
llvm-svn: 271631
This commit is contained in:
parent
3df1bfaaec
commit
5e3d314488
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@ -3905,7 +3905,7 @@ let Predicates = [HasAVX2] in
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multiclass PDI_binop_rmi<bits<8> opc, bits<8> opc2, Format ImmForm,
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string OpcodeStr, SDNode OpNode,
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SDNode OpNode2, RegisterClass RC,
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ValueType DstVT, ValueType SrcVT, PatFrag bc_frag,
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ValueType DstVT, ValueType SrcVT,
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PatFrag ld_frag, ShiftOpndItins itins,
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bit Is2Addr = 1> {
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// src2 is always 128-bit
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@ -3922,7 +3922,7 @@ multiclass PDI_binop_rmi<bits<8> opc, bits<8> opc2, Format ImmForm,
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
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[(set RC:$dst, (DstVT (OpNode RC:$src1,
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(bc_frag (ld_frag addr:$src2)))))], itins.rm>,
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(SrcVT (bitconvert (ld_frag addr:$src2))))))], itins.rm>,
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Sched<[WriteVecShiftLd, ReadAfterLd]>;
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def ri : PDIi8<opc2, ImmForm, (outs RC:$dst),
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(ins RC:$src1, u8imm:$src2),
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@ -4043,33 +4043,33 @@ defm PMULUDQ : PDI_binop_rm2<0xF4, "pmuludq", X86pmuludq, v2i64, v4i32, VR128,
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let Predicates = [HasAVX, NoVLX] in {
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defm VPSLLD : PDI_binop_rmi<0xF2, 0x72, MRM6r, "vpslld", X86vshl, X86vshli,
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VR128, v4i32, v4i32, bc_v4i32, loadv2i64,
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VR128, v4i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSLLQ : PDI_binop_rmi<0xF3, 0x73, MRM6r, "vpsllq", X86vshl, X86vshli,
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VR128, v2i64, v2i64, bc_v2i64, loadv2i64,
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VR128, v2i64, v2i64, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSRLD : PDI_binop_rmi<0xD2, 0x72, MRM2r, "vpsrld", X86vsrl, X86vsrli,
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VR128, v4i32, v4i32, bc_v4i32, loadv2i64,
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VR128, v4i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSRLQ : PDI_binop_rmi<0xD3, 0x73, MRM2r, "vpsrlq", X86vsrl, X86vsrli,
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VR128, v2i64, v2i64, bc_v2i64, loadv2i64,
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VR128, v2i64, v2i64, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSRAD : PDI_binop_rmi<0xE2, 0x72, MRM4r, "vpsrad", X86vsra, X86vsrai,
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VR128, v4i32, v4i32, bc_v4i32, loadv2i64,
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VR128, v4i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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} // Predicates = [HasAVX, NoVLX]
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let Predicates = [HasAVX, NoVLX_Or_NoBWI] in {
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defm VPSLLW : PDI_binop_rmi<0xF1, 0x71, MRM6r, "vpsllw", X86vshl, X86vshli,
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VR128, v8i16, v8i16, bc_v8i16, loadv2i64,
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VR128, v8i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSRLW : PDI_binop_rmi<0xD1, 0x71, MRM2r, "vpsrlw", X86vsrl, X86vsrli,
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VR128, v8i16, v8i16, bc_v8i16, loadv2i64,
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VR128, v8i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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defm VPSRAW : PDI_binop_rmi<0xE1, 0x71, MRM4r, "vpsraw", X86vsra, X86vsrai,
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VR128, v8i16, v8i16, bc_v8i16, loadv2i64,
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VR128, v8i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V;
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} // Predicates = [HasAVX, NoVLX_Or_NoBWI]
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@ -4094,33 +4094,33 @@ let ExeDomain = SSEPackedInt, SchedRW = [WriteVecShift] ,
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let Predicates = [HasAVX2, NoVLX] in {
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defm VPSLLDY : PDI_binop_rmi<0xF2, 0x72, MRM6r, "vpslld", X86vshl, X86vshli,
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VR256, v8i32, v4i32, bc_v4i32, loadv2i64,
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VR256, v8i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSLLQY : PDI_binop_rmi<0xF3, 0x73, MRM6r, "vpsllq", X86vshl, X86vshli,
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VR256, v4i64, v2i64, bc_v2i64, loadv2i64,
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VR256, v4i64, v2i64, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSRLDY : PDI_binop_rmi<0xD2, 0x72, MRM2r, "vpsrld", X86vsrl, X86vsrli,
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VR256, v8i32, v4i32, bc_v4i32, loadv2i64,
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VR256, v8i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSRLQY : PDI_binop_rmi<0xD3, 0x73, MRM2r, "vpsrlq", X86vsrl, X86vsrli,
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VR256, v4i64, v2i64, bc_v2i64, loadv2i64,
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VR256, v4i64, v2i64, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSRADY : PDI_binop_rmi<0xE2, 0x72, MRM4r, "vpsrad", X86vsra, X86vsrai,
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VR256, v8i32, v4i32, bc_v4i32, loadv2i64,
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VR256, v8i32, v4i32, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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}// Predicates = [HasAVX2, NoVLX]
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let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in {
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defm VPSLLWY : PDI_binop_rmi<0xF1, 0x71, MRM6r, "vpsllw", X86vshl, X86vshli,
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VR256, v16i16, v8i16, bc_v8i16, loadv2i64,
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VR256, v16i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSRLWY : PDI_binop_rmi<0xD1, 0x71, MRM2r, "vpsrlw", X86vsrl, X86vsrli,
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VR256, v16i16, v8i16, bc_v8i16, loadv2i64,
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VR256, v16i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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defm VPSRAWY : PDI_binop_rmi<0xE1, 0x71, MRM4r, "vpsraw", X86vsra, X86vsrai,
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VR256, v16i16, v8i16, bc_v8i16, loadv2i64,
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VR256, v16i16, v8i16, loadv2i64,
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SSE_INTSHIFT_ITINS_P, 0>, VEX_4V, VEX_L;
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}// Predicates = [HasAVX2, NoVLX_Or_NoBWI]
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@ -4144,30 +4144,30 @@ let ExeDomain = SSEPackedInt, SchedRW = [WriteVecShift], hasSideEffects = 0 ,
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let Constraints = "$src1 = $dst" in {
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defm PSLLW : PDI_binop_rmi<0xF1, 0x71, MRM6r, "psllw", X86vshl, X86vshli,
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VR128, v8i16, v8i16, bc_v8i16, memopv2i64,
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VR128, v8i16, v8i16, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSLLD : PDI_binop_rmi<0xF2, 0x72, MRM6r, "pslld", X86vshl, X86vshli,
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VR128, v4i32, v4i32, bc_v4i32, memopv2i64,
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VR128, v4i32, v4i32, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSLLQ : PDI_binop_rmi<0xF3, 0x73, MRM6r, "psllq", X86vshl, X86vshli,
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VR128, v2i64, v2i64, bc_v2i64, memopv2i64,
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VR128, v2i64, v2i64, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSRLW : PDI_binop_rmi<0xD1, 0x71, MRM2r, "psrlw", X86vsrl, X86vsrli,
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VR128, v8i16, v8i16, bc_v8i16, memopv2i64,
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VR128, v8i16, v8i16, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSRLD : PDI_binop_rmi<0xD2, 0x72, MRM2r, "psrld", X86vsrl, X86vsrli,
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VR128, v4i32, v4i32, bc_v4i32, memopv2i64,
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VR128, v4i32, v4i32, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSRLQ : PDI_binop_rmi<0xD3, 0x73, MRM2r, "psrlq", X86vsrl, X86vsrli,
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VR128, v2i64, v2i64, bc_v2i64, memopv2i64,
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VR128, v2i64, v2i64, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSRAW : PDI_binop_rmi<0xE1, 0x71, MRM4r, "psraw", X86vsra, X86vsrai,
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VR128, v8i16, v8i16, bc_v8i16, memopv2i64,
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VR128, v8i16, v8i16, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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defm PSRAD : PDI_binop_rmi<0xE2, 0x72, MRM4r, "psrad", X86vsra, X86vsrai,
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VR128, v4i32, v4i32, bc_v4i32, memopv2i64,
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VR128, v4i32, v4i32, memopv2i64,
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SSE_INTSHIFT_ITINS_P>;
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let ExeDomain = SSEPackedInt, SchedRW = [WriteVecShift], hasSideEffects = 0 in {
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@ -4423,8 +4423,7 @@ let Constraints = "$src1 = $dst" in {
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let ExeDomain = SSEPackedInt in {
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multiclass sse2_unpack<bits<8> opc, string OpcodeStr, ValueType vt,
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SDNode OpNode, PatFrag bc_frag, PatFrag ld_frag,
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bit Is2Addr = 1> {
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SDNode OpNode, PatFrag ld_frag, bit Is2Addr = 1> {
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def rr : PDI<opc, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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!if(Is2Addr,
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@ -4437,14 +4436,14 @@ multiclass sse2_unpack<bits<8> opc, string OpcodeStr, ValueType vt,
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!if(Is2Addr,
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!strconcat(OpcodeStr,"\t{$src2, $dst|$dst, $src2}"),
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!strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
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[(set VR128:$dst, (OpNode VR128:$src1,
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(bc_frag (ld_frag addr:$src2))))],
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[(set VR128:$dst, (vt (OpNode VR128:$src1,
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(bitconvert (ld_frag addr:$src2)))))],
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IIC_SSE_UNPCK>,
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Sched<[WriteShuffleLd, ReadAfterLd]>;
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}
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multiclass sse2_unpack_y<bits<8> opc, string OpcodeStr, ValueType vt,
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SDNode OpNode, PatFrag bc_frag> {
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SDNode OpNode> {
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def Yrr : PDI<opc, MRMSrcReg,
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(outs VR256:$dst), (ins VR256:$src1, VR256:$src2),
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!strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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@ -4453,72 +4452,72 @@ multiclass sse2_unpack_y<bits<8> opc, string OpcodeStr, ValueType vt,
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def Yrm : PDI<opc, MRMSrcMem,
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(outs VR256:$dst), (ins VR256:$src1, i256mem:$src2),
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!strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set VR256:$dst, (OpNode VR256:$src1,
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(bc_frag (loadv4i64 addr:$src2))))]>,
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[(set VR256:$dst, (vt (OpNode VR256:$src1,
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(bitconvert (loadv4i64 addr:$src2)))))]>,
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Sched<[WriteShuffleLd, ReadAfterLd]>;
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}
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let Predicates = [HasAVX, NoVLX_Or_NoBWI] in {
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defm VPUNPCKLBW : sse2_unpack<0x60, "vpunpcklbw", v16i8, X86Unpckl,
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bc_v16i8, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKLWD : sse2_unpack<0x61, "vpunpcklwd", v8i16, X86Unpckl,
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bc_v8i16, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKHBW : sse2_unpack<0x68, "vpunpckhbw", v16i8, X86Unpckh,
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bc_v16i8, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKHWD : sse2_unpack<0x69, "vpunpckhwd", v8i16, X86Unpckh,
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bc_v8i16, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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}
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let Predicates = [HasAVX, NoVLX] in {
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defm VPUNPCKLDQ : sse2_unpack<0x62, "vpunpckldq", v4i32, X86Unpckl,
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bc_v4i32, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKLQDQ : sse2_unpack<0x6C, "vpunpcklqdq", v2i64, X86Unpckl,
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bc_v2i64, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKHDQ : sse2_unpack<0x6A, "vpunpckhdq", v4i32, X86Unpckh,
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bc_v4i32, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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defm VPUNPCKHQDQ : sse2_unpack<0x6D, "vpunpckhqdq", v2i64, X86Unpckh,
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bc_v2i64, loadv2i64, 0>, VEX_4V;
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loadv2i64, 0>, VEX_4V;
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}
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let Predicates = [HasAVX2, NoVLX_Or_NoBWI] in {
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defm VPUNPCKLBW : sse2_unpack_y<0x60, "vpunpcklbw", v32i8, X86Unpckl,
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bc_v32i8>, VEX_4V, VEX_L;
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defm VPUNPCKLWD : sse2_unpack_y<0x61, "vpunpcklwd", v16i16, X86Unpckl,
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bc_v16i16>, VEX_4V, VEX_L;
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defm VPUNPCKHBW : sse2_unpack_y<0x68, "vpunpckhbw", v32i8, X86Unpckh,
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bc_v32i8>, VEX_4V, VEX_L;
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defm VPUNPCKHWD : sse2_unpack_y<0x69, "vpunpckhwd", v16i16, X86Unpckh,
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bc_v16i16>, VEX_4V, VEX_L;
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defm VPUNPCKLBW : sse2_unpack_y<0x60, "vpunpcklbw", v32i8, X86Unpckl>,
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VEX_4V, VEX_L;
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defm VPUNPCKLWD : sse2_unpack_y<0x61, "vpunpcklwd", v16i16, X86Unpckl>,
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VEX_4V, VEX_L;
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defm VPUNPCKHBW : sse2_unpack_y<0x68, "vpunpckhbw", v32i8, X86Unpckh>,
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VEX_4V, VEX_L;
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defm VPUNPCKHWD : sse2_unpack_y<0x69, "vpunpckhwd", v16i16, X86Unpckh>,
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VEX_4V, VEX_L;
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}
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let Predicates = [HasAVX2, NoVLX] in {
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defm VPUNPCKLDQ : sse2_unpack_y<0x62, "vpunpckldq", v8i32, X86Unpckl,
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bc_v8i32>, VEX_4V, VEX_L;
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defm VPUNPCKLQDQ : sse2_unpack_y<0x6C, "vpunpcklqdq", v4i64, X86Unpckl,
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bc_v4i64>, VEX_4V, VEX_L;
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defm VPUNPCKHDQ : sse2_unpack_y<0x6A, "vpunpckhdq", v8i32, X86Unpckh,
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bc_v8i32>, VEX_4V, VEX_L;
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defm VPUNPCKHQDQ : sse2_unpack_y<0x6D, "vpunpckhqdq", v4i64, X86Unpckh,
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bc_v4i64>, VEX_4V, VEX_L;
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defm VPUNPCKLDQ : sse2_unpack_y<0x62, "vpunpckldq", v8i32, X86Unpckl>,
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VEX_4V, VEX_L;
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defm VPUNPCKLQDQ : sse2_unpack_y<0x6C, "vpunpcklqdq", v4i64, X86Unpckl>,
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VEX_4V, VEX_L;
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defm VPUNPCKHDQ : sse2_unpack_y<0x6A, "vpunpckhdq", v8i32, X86Unpckh>,
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VEX_4V, VEX_L;
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defm VPUNPCKHQDQ : sse2_unpack_y<0x6D, "vpunpckhqdq", v4i64, X86Unpckh>,
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VEX_4V, VEX_L;
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}
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let Constraints = "$src1 = $dst" in {
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defm PUNPCKLBW : sse2_unpack<0x60, "punpcklbw", v16i8, X86Unpckl,
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bc_v16i8, memopv2i64>;
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memopv2i64>;
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defm PUNPCKLWD : sse2_unpack<0x61, "punpcklwd", v8i16, X86Unpckl,
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bc_v8i16, memopv2i64>;
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memopv2i64>;
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defm PUNPCKLDQ : sse2_unpack<0x62, "punpckldq", v4i32, X86Unpckl,
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bc_v4i32, memopv2i64>;
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memopv2i64>;
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defm PUNPCKLQDQ : sse2_unpack<0x6C, "punpcklqdq", v2i64, X86Unpckl,
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bc_v2i64, memopv2i64>;
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memopv2i64>;
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defm PUNPCKHBW : sse2_unpack<0x68, "punpckhbw", v16i8, X86Unpckh,
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bc_v16i8, memopv2i64>;
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memopv2i64>;
|
||||
defm PUNPCKHWD : sse2_unpack<0x69, "punpckhwd", v8i16, X86Unpckh,
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bc_v8i16, memopv2i64>;
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memopv2i64>;
|
||||
defm PUNPCKHDQ : sse2_unpack<0x6A, "punpckhdq", v4i32, X86Unpckh,
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bc_v4i32, memopv2i64>;
|
||||
memopv2i64>;
|
||||
defm PUNPCKHQDQ : sse2_unpack<0x6D, "punpckhqdq", v2i64, X86Unpckh,
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bc_v2i64, memopv2i64>;
|
||||
memopv2i64>;
|
||||
}
|
||||
} // ExeDomain = SSEPackedInt
|
||||
|
||||
|
|
Loading…
Reference in New Issue