forked from OSchip/llvm-project
[AArch64][GlobalISel] Fix an crash in RBS due to a new regclass being added.
rdar://84674985
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4e4883e1f3
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5dd9e019dd
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@ -13,6 +13,8 @@
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#include "AArch64RegisterBankInfo.h"
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#include "AArch64RegisterBankInfo.h"
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#include "AArch64InstrInfo.h"
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#include "AArch64InstrInfo.h"
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#include "AArch64RegisterInfo.h"
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#include "MCTargetDesc/AArch64MCTargetDesc.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
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#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
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@ -272,6 +274,7 @@ AArch64RegisterBankInfo::getRegBankFromRegClass(const TargetRegisterClass &RC,
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case AArch64::WSeqPairsClassRegClassID:
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case AArch64::WSeqPairsClassRegClassID:
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case AArch64::XSeqPairsClassRegClassID:
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case AArch64::XSeqPairsClassRegClassID:
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case AArch64::MatrixIndexGPR32_12_15RegClassID:
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case AArch64::MatrixIndexGPR32_12_15RegClassID:
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case AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID:
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return getRegBank(AArch64::GPRRegBankID);
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return getRegBank(AArch64::GPRRegBankID);
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case AArch64::CCRRegClassID:
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case AArch64::CCRRegClassID:
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return getRegBank(AArch64::CCRegBankID);
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return getRegBank(AArch64::CCRegBankID);
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@ -0,0 +1,56 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s
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# Check we don't crash because of an unhandled new regclass GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID.
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---
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name: foo
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alignment: 4
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legalized: true
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tracksRegLiveness: true
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body: |
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bb.1:
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; CHECK-LABEL: name: foo
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; CHECK: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
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; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x1 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x2 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x3 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x4 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x5 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x6 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x7 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x8 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x9 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x11 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x12 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x13 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x14 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x15 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x16 = COPY [[DEF]](s64)
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; CHECK-NEXT: $x17 = COPY [[DEF]](s64)
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; CHECK-NEXT: INLINEASM &"svc 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x0, 10 /* regdef */, implicit-def $x1, 10 /* regdef */, implicit-def $x2, 10 /* regdef */, implicit-def $x3, 10 /* regdef */, implicit-def $x4, 10 /* regdef */, implicit-def $x5, 10 /* regdef */, implicit-def $x6, 10 /* regdef */, implicit-def $x7, 10 /* regdef */, implicit-def $x8, 10 /* regdef */, implicit-def $x9, 10 /* regdef */, implicit-def $x10, 10 /* regdef */, implicit-def $x11, 10 /* regdef */, implicit-def $x12, 10 /* regdef */, implicit-def $x13, 10 /* regdef */, implicit-def $x14, 10 /* regdef */, implicit-def $x15, 10 /* regdef */, implicit-def $x16, 10 /* regdef */, implicit-def $x17, 9 /* reguse */, $x0, 9 /* reguse */, $x1, 9 /* reguse */, $x2, 9 /* reguse */, $x3, 9 /* reguse */, $x4, 9 /* reguse */, $x5, 9 /* reguse */, $x6, 9 /* reguse */, $x7, 9 /* reguse */, $x8, 9 /* reguse */, $x9, 9 /* reguse */, $x10, 9 /* reguse */, $x11, 9 /* reguse */, $x12, 9 /* reguse */, $x13, 9 /* reguse */, $x14, 9 /* reguse */, $x15, 9 /* reguse */, $x16, 9 /* reguse */, $x17
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; CHECK-NEXT: RET_ReallyLR
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%0:_(s64) = G_IMPLICIT_DEF
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$x0 = COPY %0(s64)
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$x1 = COPY %0(s64)
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$x2 = COPY %0(s64)
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$x3 = COPY %0(s64)
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$x4 = COPY %0(s64)
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$x5 = COPY %0(s64)
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$x6 = COPY %0(s64)
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$x7 = COPY %0(s64)
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$x8 = COPY %0(s64)
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$x9 = COPY %0(s64)
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$x10 = COPY %0(s64)
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$x11 = COPY %0(s64)
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$x12 = COPY %0(s64)
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$x13 = COPY %0(s64)
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$x14 = COPY %0(s64)
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$x15 = COPY %0(s64)
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$x16 = COPY %0(s64)
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$x17 = COPY %0(s64)
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INLINEASM &"svc 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x0, 10 /* regdef */, implicit-def $x1, 10 /* regdef */, implicit-def $x2, 10 /* regdef */, implicit-def $x3, 10 /* regdef */, implicit-def $x4, 10 /* regdef */, implicit-def $x5, 10 /* regdef */, implicit-def $x6, 10 /* regdef */, implicit-def $x7, 10 /* regdef */, implicit-def $x8, 10 /* regdef */, implicit-def $x9, 10 /* regdef */, implicit-def $x10, 10 /* regdef */, implicit-def $x11, 10 /* regdef */, implicit-def $x12, 10 /* regdef */, implicit-def $x13, 10 /* regdef */, implicit-def $x14, 10 /* regdef */, implicit-def $x15, 10 /* regdef */, implicit-def $x16, 10 /* regdef */, implicit-def $x17, 9 /* reguse */, $x0, 9 /* reguse */, $x1, 9 /* reguse */, $x2, 9 /* reguse */, $x3, 9 /* reguse */, $x4, 9 /* reguse */, $x5, 9 /* reguse */, $x6, 9 /* reguse */, $x7, 9 /* reguse */, $x8, 9 /* reguse */, $x9, 9 /* reguse */, $x10, 9 /* reguse */, $x11, 9 /* reguse */, $x12, 9 /* reguse */, $x13, 9 /* reguse */, $x14, 9 /* reguse */, $x15, 9 /* reguse */, $x16, 9 /* reguse */, $x17
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RET_ReallyLR
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...
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