From 5db84df728d86d2c4bb102096ac0ba08e1d37456 Mon Sep 17 00:00:00 2001 From: Eugene Zelenko Date: Fri, 17 Feb 2017 21:43:25 +0000 Subject: [PATCH] [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). llvm-svn: 295499 --- llvm/include/llvm/CodeGen/LexicalScopes.h | 32 ++++----- llvm/include/llvm/CodeGen/LiveIntervalUnion.h | 50 +++++++------- llvm/include/llvm/CodeGen/LiveRegMatrix.h | 19 ++++-- llvm/include/llvm/CodeGen/LiveRegUnits.h | 11 ++-- llvm/include/llvm/CodeGen/LowLevelType.h | 52 ++++++++------- .../llvm/CodeGen/MachineRegisterInfo.h | 66 ++++++++++++------- llvm/lib/CodeGen/LexicalScopes.cpp | 19 ++++-- llvm/lib/CodeGen/LiveIntervalUnion.cpp | 14 ++-- llvm/lib/CodeGen/LiveRegMatrix.cpp | 14 ++-- llvm/lib/CodeGen/LiveRegUnits.cpp | 7 +- llvm/lib/CodeGen/LowLevelType.cpp | 8 ++- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 27 ++++++-- 12 files changed, 191 insertions(+), 128 deletions(-) diff --git a/llvm/include/llvm/CodeGen/LexicalScopes.h b/llvm/include/llvm/CodeGen/LexicalScopes.h index fd993585659f..6c35832f963c 100644 --- a/llvm/include/llvm/CodeGen/LexicalScopes.h +++ b/llvm/include/llvm/CodeGen/LexicalScopes.h @@ -1,4 +1,4 @@ -//===- LexicalScopes.cpp - Collecting lexical scope info -*- C++ -*--------===// +//===- LexicalScopes.cpp - Collecting lexical scope info --------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -19,19 +19,18 @@ #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/DenseMap.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/SmallVector.h" -#include "llvm/IR/DebugLoc.h" #include "llvm/IR/DebugInfoMetadata.h" -#include "llvm/IR/ValueHandle.h" +#include #include #include + namespace llvm { -class MachineInstr; class MachineBasicBlock; class MachineFunction; +class MachineInstr; //===----------------------------------------------------------------------===// /// InsnRange - This is used to track range of instructions with identical @@ -43,12 +42,10 @@ typedef std::pair InsnRange; /// LexicalScope - This class is used to track scope information. /// class LexicalScope { - public: LexicalScope(LexicalScope *P, const DILocalScope *D, const DILocation *I, bool A) - : Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A), - LastInsn(nullptr), FirstInsn(nullptr), DFSIn(0), DFSOut(0) { + : Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A) { assert(D); assert(D->getSubprogram()->getUnit()->getEmissionKind() != DICompileUnit::NoDebug && @@ -131,10 +128,10 @@ private: // Contents not owned. SmallVector Ranges; - const MachineInstr *LastInsn; // Last instruction of this scope. - const MachineInstr *FirstInsn; // First instruction of this scope. - unsigned DFSIn, DFSOut; // In & Out Depth use to determine - // scope nesting. + const MachineInstr *LastInsn = nullptr; // Last instruction of this scope. + const MachineInstr *FirstInsn = nullptr; // First instruction of this scope. + unsigned DFSIn = 0; // In & Out Depth use to determine scope nesting. + unsigned DFSOut = 0; }; //===----------------------------------------------------------------------===// @@ -143,7 +140,7 @@ private: /// class LexicalScopes { public: - LexicalScopes() : MF(nullptr), CurrentFnLexicalScope(nullptr) {} + LexicalScopes() = default; /// initialize - Scan machine function and constuct lexical scope nest, resets /// the instance if necessary. @@ -229,8 +226,7 @@ private: assignInstructionRanges(SmallVectorImpl &MIRanges, DenseMap &M); -private: - const MachineFunction *MF; + const MachineFunction *MF = nullptr; /// LexicalScopeMap - Tracks the scopes in the current function. // Use an unordered_map to ensure value pointer validity over insertion. @@ -253,9 +249,9 @@ private: /// CurrentFnLexicalScope - Top level scope for the current function. /// - LexicalScope *CurrentFnLexicalScope; + LexicalScope *CurrentFnLexicalScope = nullptr; }; -} // end llvm namespace +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_LEXICALSCOPES_H diff --git a/llvm/include/llvm/CodeGen/LiveIntervalUnion.h b/llvm/include/llvm/CodeGen/LiveIntervalUnion.h index f0f1637dc92d..5aa3974e1b3b 100644 --- a/llvm/include/llvm/CodeGen/LiveIntervalUnion.h +++ b/llvm/include/llvm/CodeGen/LiveIntervalUnion.h @@ -1,4 +1,4 @@ -//===-- LiveIntervalUnion.h - Live interval union data struct --*- C++ -*--===// +//===- LiveIntervalUnion.h - Live interval union data struct ---*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -18,7 +18,11 @@ #define LLVM_CODEGEN_LIVEINTERVALUNION_H #include "llvm/ADT/IntervalMap.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/LiveInterval.h" +#include "llvm/CodeGen/SlotIndexes.h" +#include +#include namespace llvm { @@ -56,14 +60,12 @@ public: // LiveIntervalUnions share an external allocator. typedef LiveSegments::Allocator Allocator; - class Query; - private: - unsigned Tag; // unique tag for current contents. + unsigned Tag = 0; // unique tag for current contents. LiveSegments Segments; // union of virtual reg segments public: - explicit LiveIntervalUnion(Allocator &a) : Tag(0), Segments(a) {} + explicit LiveIntervalUnion(Allocator &a) : Segments(a) {} // Iterate over all segments in the union of live virtual registers ordered // by their starting position. @@ -109,23 +111,23 @@ public: /// Query interferences between a single live virtual register and a live /// interval union. class Query { - LiveIntervalUnion *LiveUnion; - LiveInterval *VirtReg; + LiveIntervalUnion *LiveUnion = nullptr; + LiveInterval *VirtReg = nullptr; LiveInterval::iterator VirtRegI; // current position in VirtReg SegmentIter LiveUnionI; // current position in LiveUnion SmallVector InterferingVRegs; - bool CheckedFirstInterference; - bool SeenAllInterferences; - bool SeenUnspillableVReg; - unsigned Tag, UserTag; + bool CheckedFirstInterference = false; + bool SeenAllInterferences = false; + bool SeenUnspillableVReg = false; + unsigned Tag = 0; + unsigned UserTag = 0; public: - Query(): LiveUnion(), VirtReg(), Tag(0), UserTag(0) {} - + Query() = default; Query(LiveInterval *VReg, LiveIntervalUnion *LIU): - LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false), - SeenAllInterferences(false), SeenUnspillableVReg(false) - {} + LiveUnion(LIU), VirtReg(VReg) {} + Query(const Query &) = delete; + Query &operator=(const Query &) = delete; void clear() { LiveUnion = nullptr; @@ -162,7 +164,8 @@ public: // Count the virtual registers in this union that interfere with this // query's live virtual register, up to maxInterferingRegs. - unsigned collectInterferingVRegs(unsigned MaxInterferingRegs = UINT_MAX); + unsigned collectInterferingVRegs( + unsigned MaxInterferingRegs = std::numeric_limits::max()); // Was this virtual register visited during collectInterferingVRegs? bool isSeenInterference(LiveInterval *VReg) const; @@ -177,18 +180,15 @@ public: const SmallVectorImpl &interferingVRegs() const { return InterferingVRegs; } - - private: - Query(const Query&) = delete; - void operator=(const Query&) = delete; }; // Array of LiveIntervalUnions. class Array { - unsigned Size; - LiveIntervalUnion *LIUs; + unsigned Size = 0; + LiveIntervalUnion *LIUs = nullptr; + public: - Array() : Size(0), LIUs(nullptr) {} + Array() = default; ~Array() { clear(); } // Initialize the array to have Size entries. @@ -213,4 +213,4 @@ public: } // end namespace llvm -#endif // !defined(LLVM_CODEGEN_LIVEINTERVALUNION_H) +#endif // LLVM_CODEGEN_LIVEINTERVALUNION_H diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h b/llvm/include/llvm/CodeGen/LiveRegMatrix.h index e169058ca563..7373e79f1a6b 100644 --- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h +++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h @@ -1,4 +1,4 @@ -//===-- LiveRegMatrix.h - Track register interference ---------*- C++ -*---===// +//===- LiveRegMatrix.h - Track register interference ----------*- C++ -*---===// // // The LLVM Compiler Infrastructure // @@ -27,11 +27,14 @@ #include "llvm/ADT/BitVector.h" #include "llvm/CodeGen/LiveIntervalUnion.h" #include "llvm/CodeGen/MachineFunctionPass.h" +#include namespace llvm { +class AnalysisUsage; class LiveInterval; -class LiveIntervalAnalysis; +class LiveIntervals; +class MachineFunction; class TargetRegisterInfo; class VirtRegMap; @@ -41,7 +44,7 @@ class LiveRegMatrix : public MachineFunctionPass { VirtRegMap *VRM; // UserTag changes whenever virtual registers have been modified. - unsigned UserTag; + unsigned UserTag = 0; // The matrix is represented as a LiveIntervalUnion per register unit. LiveIntervalUnion::Allocator LIUAlloc; @@ -51,16 +54,18 @@ class LiveRegMatrix : public MachineFunctionPass { std::unique_ptr Queries; // Cached register mask interference info. - unsigned RegMaskTag; - unsigned RegMaskVirtReg; + unsigned RegMaskTag = 0; + unsigned RegMaskVirtReg = 0; BitVector RegMaskUsable; // MachineFunctionPass boilerplate. - void getAnalysisUsage(AnalysisUsage&) const override; - bool runOnMachineFunction(MachineFunction&) override; + void getAnalysisUsage(AnalysisUsage &) const override; + bool runOnMachineFunction(MachineFunction &) override; void releaseMemory() override; + public: static char ID; + LiveRegMatrix(); //===--------------------------------------------------------------------===// diff --git a/llvm/include/llvm/CodeGen/LiveRegUnits.h b/llvm/include/llvm/CodeGen/LiveRegUnits.h index 33f4a4a0337d..5de76c8b87bf 100644 --- a/llvm/include/llvm/CodeGen/LiveRegUnits.h +++ b/llvm/include/llvm/CodeGen/LiveRegUnits.h @@ -17,6 +17,9 @@ #include "llvm/ADT/BitVector.h" #include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/MC/LaneBitmask.h" +#include "llvm/MC/MCRegisterInfo.h" +#include namespace llvm { @@ -25,12 +28,12 @@ class MachineBasicBlock; /// A set of register units used to track register liveness. class LiveRegUnits { - const TargetRegisterInfo *TRI; + const TargetRegisterInfo *TRI = nullptr; BitVector Units; public: /// Constructs a new empty LiveRegUnits set. - LiveRegUnits() : TRI(nullptr) {} + LiveRegUnits() = default; /// Constructs and initialize an empty LiveRegUnits set. LiveRegUnits(const TargetRegisterInfo &TRI) { @@ -120,6 +123,6 @@ public: } }; -} // namespace llvm +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_LIVEREGUNITS_H diff --git a/llvm/include/llvm/CodeGen/LowLevelType.h b/llvm/include/llvm/CodeGen/LowLevelType.h index b8885c3a95fd..a505eabf93ef 100644 --- a/llvm/include/llvm/CodeGen/LowLevelType.h +++ b/llvm/include/llvm/CodeGen/LowLevelType.h @@ -1,4 +1,4 @@ -//== llvm/CodeGen/GlobalISel/LowLevelType.h -------------------- -*- C++ -*-==// +//===- llvm/CodeGen/GlobalISel/LowLevelType.h -------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -27,19 +27,21 @@ #ifndef LLVM_CODEGEN_GLOBALISEL_LOWLEVELTYPE_H #define LLVM_CODEGEN_GLOBALISEL_LOWLEVELTYPE_H -#include #include "llvm/ADT/DenseMapInfo.h" -#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/CodeGen/MachineValueType.h" +#include +#include namespace llvm { class DataLayout; -class LLVMContext; -class Type; class raw_ostream; +class Type; class LLT { public: + friend struct DenseMapInfo; + enum TypeKind : uint16_t { Invalid, Scalar, @@ -47,6 +49,19 @@ public: Vector, }; + explicit LLT(TypeKind Kind, uint16_t NumElements, unsigned SizeInBits) + : SizeInBits(SizeInBits), ElementsOrAddrSpace(NumElements), Kind(Kind) { + assert((Kind != Vector || ElementsOrAddrSpace > 1) && + "invalid number of vector elements"); + } + + explicit LLT() = default; + + /// Construct a low-level type based on an LLVM type. + explicit LLT(Type &Ty, const DataLayout &DL); + + explicit LLT(MVT VT); + /// Get a low-level scalar or aggregate "bag of bits". static LLT scalar(unsigned SizeInBits) { assert(SizeInBits > 0 && "invalid scalar size"); @@ -72,19 +87,6 @@ public: return LLT{Vector, NumElements, ScalarTy.getSizeInBits()}; } - explicit LLT(TypeKind Kind, uint16_t NumElements, unsigned SizeInBits) - : SizeInBits(SizeInBits), ElementsOrAddrSpace(NumElements), Kind(Kind) { - assert((Kind != Vector || ElementsOrAddrSpace > 1) && - "invalid number of vector elements"); - } - - explicit LLT() : SizeInBits(0), ElementsOrAddrSpace(0), Kind(Invalid) {} - - /// Construct a low-level type based on an LLVM type. - explicit LLT(Type &Ty, const DataLayout &DL); - - explicit LLT(MVT VT); - bool isValid() const { return Kind != Invalid; } bool isScalar() const { return Kind == Scalar; } @@ -172,11 +174,10 @@ public: bool operator!=(const LLT &RHS) const { return !(*this == RHS); } - friend struct DenseMapInfo; private: - unsigned SizeInBits; - uint16_t ElementsOrAddrSpace; - TypeKind Kind; + unsigned SizeInBits = 0; + uint16_t ElementsOrAddrSpace = 0; + TypeKind Kind = Invalid; }; inline raw_ostream& operator<<(raw_ostream &OS, const LLT &Ty) { @@ -188,19 +189,22 @@ template<> struct DenseMapInfo { static inline LLT getEmptyKey() { return LLT{LLT::Invalid, 0, -1u}; } + static inline LLT getTombstoneKey() { return LLT{LLT::Invalid, 0, -2u}; } + static inline unsigned getHashValue(const LLT &Ty) { uint64_t Val = ((uint64_t)Ty.SizeInBits << 32) | ((uint64_t)Ty.ElementsOrAddrSpace << 16) | (uint64_t)Ty.Kind; return DenseMapInfo::getHashValue(Val); } + static bool isEqual(const LLT &LHS, const LLT &RHS) { return LHS == RHS; } }; -} +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_GLOBALISEL_LOWLEVELTYPE_H diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h index c599caf7535d..eeada3c886ac 100644 --- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/MachineRegisterInfo.h ----------------------*- C++ -*-===// +//===- llvm/CodeGen/MachineRegisterInfo.h -----------------------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -15,19 +15,29 @@ #define LLVM_CODEGEN_MACHINEREGISTERINFO_H #include "llvm/ADT/BitVector.h" +#include "llvm/ADT/DenseMap.h" #include "llvm/ADT/IndexedMap.h" -#include "llvm/ADT/PointerUnion.h" #include "llvm/ADT/iterator_range.h" -// PointerUnion needs to have access to the full RegisterBank type. +#include "llvm/ADT/PointerUnion.h" #include "llvm/CodeGen/GlobalISel/RegisterBank.h" #include "llvm/CodeGen/LowLevelType.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBundle.h" +#include "llvm/CodeGen/MachineOperand.h" +#include "llvm/MC/LaneBitmask.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" #include +#include +#include +#include +#include +#include +#include namespace llvm { + class PSetIterator; /// Convenient type to represent either a register class or a register bank. @@ -41,15 +51,16 @@ class MachineRegisterInfo { public: class Delegate { virtual void anchor(); - public: - virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0; - virtual ~Delegate() {} + public: + virtual ~Delegate() = default; + + virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0; }; private: MachineFunction *MF; - Delegate *TheDelegate; + Delegate *TheDelegate = nullptr; /// True if subregister liveness is tracked. const bool TracksSubRegLiveness; @@ -113,12 +124,12 @@ private: /// Live in values are typically arguments in registers. LiveIn values are /// allowed to have virtual registers associated with them, stored in the /// second element. - std::vector > LiveIns; + std::vector> LiveIns; - MachineRegisterInfo(const MachineRegisterInfo&) = delete; - void operator=(const MachineRegisterInfo&) = delete; public: explicit MachineRegisterInfo(MachineFunction *MF); + MachineRegisterInfo(const MachineRegisterInfo &) = delete; + MachineRegisterInfo &operator=(const MachineRegisterInfo &) = delete; const TargetRegisterInfo *getTargetRegisterInfo() const { return MF->getSubtarget().getRegisterInfo(); @@ -227,8 +238,6 @@ public: template friend class defusechain_instr_iterator; - - /// reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified /// register. typedef defusechain_iterator @@ -800,7 +809,7 @@ public: // Iteration support for the live-ins set. It's kept in sorted order // by register number. - typedef std::vector >::const_iterator + typedef std::vector>::const_iterator livein_iterator; livein_iterator livein_begin() const { return LiveIns.begin(); } livein_iterator livein_end() const { return LiveIns.end(); } @@ -836,7 +845,10 @@ public: bool ByOperand, bool ByInstr, bool ByBundle> class defusechain_iterator : public std::iterator { - MachineOperand *Op; + friend class MachineRegisterInfo; + + MachineOperand *Op = nullptr; + explicit defusechain_iterator(MachineOperand *op) : Op(op) { // If the first node isn't one we're interested in, advance to one that // we are interested in. @@ -847,7 +859,6 @@ public: advance(); } } - friend class MachineRegisterInfo; void advance() { assert(Op && "Cannot increment end iterator!"); @@ -868,13 +879,14 @@ public: Op = getNextOperandForReg(Op); } } + public: typedef std::iterator::reference reference; typedef std::iterator::pointer pointer; - defusechain_iterator() : Op(nullptr) {} + defusechain_iterator() = default; bool operator==(const defusechain_iterator &x) const { return Op == x.Op; @@ -939,7 +951,10 @@ public: bool ByOperand, bool ByInstr, bool ByBundle> class defusechain_instr_iterator : public std::iterator { - MachineOperand *Op; + friend class MachineRegisterInfo; + + MachineOperand *Op = nullptr; + explicit defusechain_instr_iterator(MachineOperand *op) : Op(op) { // If the first node isn't one we're interested in, advance to one that // we are interested in. @@ -950,7 +965,6 @@ public: advance(); } } - friend class MachineRegisterInfo; void advance() { assert(Op && "Cannot increment end iterator!"); @@ -971,13 +985,14 @@ public: Op = getNextOperandForReg(Op); } } + public: typedef std::iterator::reference reference; typedef std::iterator::pointer pointer; - defusechain_instr_iterator() : Op(nullptr) {} + defusechain_instr_iterator() = default; bool operator==(const defusechain_instr_iterator &x) const { return Op == x.Op; @@ -1029,10 +1044,12 @@ public: /// register. If Reg is physical, it must be a register unit (from /// MCRegUnitIterator). class PSetIterator { - const int *PSet; - unsigned Weight; + const int *PSet = nullptr; + unsigned Weight = 0; + public: - PSetIterator(): PSet(nullptr), Weight(0) {} + PSetIterator() = default; + PSetIterator(unsigned RegUnit, const MachineRegisterInfo *MRI) { const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo(); if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { @@ -1047,6 +1064,7 @@ public: if (*PSet == -1) PSet = nullptr; } + bool isValid() const { return PSet; } unsigned getWeight() const { return Weight; } @@ -1066,6 +1084,6 @@ getPressureSets(unsigned RegUnit) const { return PSetIterator(RegUnit, this); } -} // End llvm namespace +} // end namespace llvm -#endif +#endif // LLVM_CODEGEN_MACHINEREGISTERINFO_H diff --git a/llvm/lib/CodeGen/LexicalScopes.cpp b/llvm/lib/CodeGen/LexicalScopes.cpp index 205902b2e94a..275d84e2c185 100644 --- a/llvm/lib/CodeGen/LexicalScopes.cpp +++ b/llvm/lib/CodeGen/LexicalScopes.cpp @@ -14,14 +14,23 @@ // //===----------------------------------------------------------------------===// +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallVector.h" #include "llvm/CodeGen/LexicalScopes.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/IR/DebugInfo.h" -#include "llvm/IR/Function.h" +#include "llvm/IR/DebugInfoMetadata.h" +#include "llvm/IR/Metadata.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/FormattedStream.h" +#include "llvm/Support/raw_ostream.h" +#include +#include +#include +#include + using namespace llvm; #define DEBUG_TYPE "lexicalscopes" @@ -58,7 +67,6 @@ void LexicalScopes::initialize(const MachineFunction &Fn) { void LexicalScopes::extractLexicalScopes( SmallVectorImpl &MIRanges, DenseMap &MI2ScopeMap) { - // Scan each instruction and create scopes. First build working set of scopes. for (const auto &MBB : *MF) { const MachineInstr *RangeBeginMI = nullptr; @@ -248,7 +256,6 @@ void LexicalScopes::constructScopeNest(LexicalScope *Scope) { void LexicalScopes::assignInstructionRanges( SmallVectorImpl &MIRanges, DenseMap &MI2ScopeMap) { - LexicalScope *PrevLexicalScope = nullptr; for (const auto &R : MIRanges) { LexicalScope *S = MI2ScopeMap.lookup(R.first); diff --git a/llvm/lib/CodeGen/LiveIntervalUnion.cpp b/llvm/lib/CodeGen/LiveIntervalUnion.cpp index fc2f233f6d68..cae899342e34 100644 --- a/llvm/lib/CodeGen/LiveIntervalUnion.cpp +++ b/llvm/lib/CodeGen/LiveIntervalUnion.cpp @@ -1,4 +1,4 @@ -//===-- LiveIntervalUnion.cpp - Live interval union data structure --------===// +//===- LiveIntervalUnion.cpp - Live interval union data structure ---------===// // // The LLVM Compiler Infrastructure // @@ -13,19 +13,19 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/LiveIntervalUnion.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SparseBitVector.h" -#include "llvm/Support/Debug.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/CodeGen/LiveInterval.h" +#include "llvm/CodeGen/LiveIntervalUnion.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetRegisterInfo.h" -#include +#include +#include using namespace llvm; #define DEBUG_TYPE "regalloc" - // Merge a LiveInterval's segments. Guarantee no overlaps. void LiveIntervalUnion::unify(LiveInterval &VirtReg, const LiveRange &Range) { if (Range.empty()) @@ -64,7 +64,7 @@ void LiveIntervalUnion::extract(LiveInterval &VirtReg, const LiveRange &Range) { LiveRange::const_iterator RegEnd = Range.end(); SegmentIter SegPos = Segments.find(RegPos->start); - for (;;) { + while (true) { assert(SegPos.value() == &VirtReg && "Inconsistent LiveInterval"); SegPos.erase(); if (!SegPos.valid()) diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp index 7a51386aa9ca..e5ae855a9f68 100644 --- a/llvm/lib/CodeGen/LiveRegMatrix.cpp +++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp @@ -1,4 +1,4 @@ -//===-- LiveRegMatrix.cpp - Track register interference -------------------===// +//===- LiveRegMatrix.cpp - Track register interference --------------------===// // // The LLVM Compiler Infrastructure // @@ -11,15 +11,22 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/LiveRegMatrix.h" #include "RegisterCoalescer.h" #include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/LiveInterval.h" #include "llvm/CodeGen/LiveIntervalAnalysis.h" +#include "llvm/CodeGen/LiveRegMatrix.h" #include "llvm/CodeGen/VirtRegMap.h" +#include "llvm/CodeGen/LiveIntervalUnion.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/Pass.h" +#include "llvm/MC/LaneBitmask.h" +#include "llvm/MC/MCRegisterInfo.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include using namespace llvm; @@ -36,8 +43,7 @@ INITIALIZE_PASS_DEPENDENCY(VirtRegMap) INITIALIZE_PASS_END(LiveRegMatrix, "liveregmatrix", "Live Register Matrix", false, false) -LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID), - UserTag(0), RegMaskTag(0), RegMaskVirtReg(0) {} +LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID) {} void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const { AU.setPreservesAll(); diff --git a/llvm/lib/CodeGen/LiveRegUnits.cpp b/llvm/lib/CodeGen/LiveRegUnits.cpp index 0a10b4e6265c..dff555f49565 100644 --- a/llvm/lib/CodeGen/LiveRegUnits.cpp +++ b/llvm/lib/CodeGen/LiveRegUnits.cpp @@ -1,4 +1,4 @@ -//===--- LiveRegUnits.cpp - Register Unit Set -----------------------------===// +//===- LiveRegUnits.cpp - Register Unit Set -------------------------------===// // // The LLVM Compiler Infrastructure // @@ -12,9 +12,14 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/LiveRegUnits.h" +#include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstrBundle.h" +#include "llvm/CodeGen/MachineOperand.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Target/TargetRegisterInfo.h" + using namespace llvm; void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) { diff --git a/llvm/lib/CodeGen/LowLevelType.cpp b/llvm/lib/CodeGen/LowLevelType.cpp index d74b7306e0f4..cc1ce79a7ead 100644 --- a/llvm/lib/CodeGen/LowLevelType.cpp +++ b/llvm/lib/CodeGen/LowLevelType.cpp @@ -1,4 +1,4 @@ -//===-- llvm/CodeGen/GlobalISel/LowLevelType.cpp --------------------------===// +//===- llvm/CodeGen/GlobalISel/LowLevelType.cpp ---------------------------===// // // The LLVM Compiler Infrastructure // @@ -13,9 +13,15 @@ //===----------------------------------------------------------------------===// #include "llvm/CodeGen/LowLevelType.h" +#include "llvm/CodeGen/MachineValueType.h" #include "llvm/IR/DataLayout.h" #include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/Type.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" +#include + using namespace llvm; LLT::LLT(Type &Ty, const DataLayout &DL) { diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index be4f3cc9dc57..2bb5b0540669 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===-- lib/Codegen/MachineRegisterInfo.cpp -------------------------------===// +//===- lib/Codegen/MachineRegisterInfo.cpp --------------------------------===// // // The LLVM Compiler Infrastructure // @@ -11,13 +11,27 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/ADT/iterator_range.h" +#include "llvm/CodeGen/LowLevelType.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/DebugLoc.h" #include "llvm/IR/Function.h" -#include "llvm/Support/raw_os_ostream.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/CommandLine.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetInstrInfo.h" -#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetSubtargetInfo.h" +#include using namespace llvm; @@ -28,9 +42,8 @@ static cl::opt EnableSubRegLiveness("enable-subreg-liveness", cl::Hidden, void MachineRegisterInfo::Delegate::anchor() {} MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) - : MF(MF), TheDelegate(nullptr), - TracksSubRegLiveness(MF->getSubtarget().enableSubRegLiveness() && - EnableSubRegLiveness) { + : MF(MF), TracksSubRegLiveness(MF->getSubtarget().enableSubRegLiveness() && + EnableSubRegLiveness) { unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); VRegInfo.reserve(256); RegAllocHints.reserve(256);