diff --git a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
index c0154514712c..e9ce02f1ff71 100644
--- a/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -720,14 +720,14 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
   if ((TSFlags & X86II::Op0Mask) == X86II::REP)
     EmitByte(0xF3, CurByte, OS);
 
-  // Emit the operand size opcode prefix as needed.
-  if (TSFlags & X86II::OpSize)
-    EmitByte(0x66, CurByte, OS);
-
   // Emit the address size opcode prefix as needed.
   if ((TSFlags & X86II::AdSize) ||
       (MemOperand != -1 && Is64BitMode && Is32BitMemOperand(MI, MemOperand)))
     EmitByte(0x67, CurByte, OS);
+  
+  // Emit the operand size opcode prefix as needed.
+  if (TSFlags & X86II::OpSize)
+    EmitByte(0x66, CurByte, OS);
 
   bool Need0FPrefix = false;
   switch (TSFlags & X86II::Op0Mask) {
diff --git a/llvm/test/MC/AsmParser/X86/x86_instructions.s b/llvm/test/MC/AsmParser/X86/x86_instructions.s
index 248cec193827..24f5a27ef6d7 100644
--- a/llvm/test/MC/AsmParser/X86/x86_instructions.s
+++ b/llvm/test/MC/AsmParser/X86/x86_instructions.s
@@ -449,3 +449,8 @@ leaq	8(%rax), %rsi
 // CHECK: leaq	8(%rax), %rsi
 // CHECK: encoding: [0x48,0x8d,0x70,0x08]
 
+
+cvttpd2dq	0xdeadbeef(%ebx,%ecx,8),%xmm5
+// CHECK: cvttpd2dq	3735928559(%ebx,%ecx,8), %xmm5
+// CHECK: encoding: [0x67,0x66,0x0f,0xe6,0xac,0xcb,0xef,0xbe,0xad,0xde]
+