forked from OSchip/llvm-project
[GlobalISel] Add lowering support for G_ABS and use for AArch64.
Differential Revision: https://reviews.llvm.org/D87952
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@ -3090,6 +3090,22 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT LowerHintTy) {
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case G_SSHLSAT:
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case G_USHLSAT:
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return lowerShlSat(MI);
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case G_ABS: {
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// Expand %res = G_ABS %a into:
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// %v1 = G_ASHR %a, scalar_size-1
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// %v2 = G_ADD %a, %v1
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// %res = G_XOR %v2, %v1
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LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
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Register OpReg = MI.getOperand(1).getReg();
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auto ShiftAmt =
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MIRBuilder.buildConstant(DstTy, DstTy.getScalarSizeInBits() - 1);
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auto Shift =
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MIRBuilder.buildAShr(DstTy, OpReg, ShiftAmt);
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auto Add = MIRBuilder.buildAdd(DstTy, OpReg, Shift);
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MIRBuilder.buildXor(MI.getOperand(0).getReg(), Add, Shift);
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MI.eraseFromParent();
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return Legalized;
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}
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}
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}
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@ -657,6 +657,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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getActionDefinitionsBuilder({G_MEMCPY, G_MEMMOVE, G_MEMSET}).libcall();
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getActionDefinitionsBuilder(G_ABS).lowerIf(
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[=](const LegalityQuery &Query) { return Query.Types[0].isScalar(); });
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computeTables();
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verify(*ST.getInstrInfo());
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}
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@ -0,0 +1,34 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
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---
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name: abs_s32
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liveins:
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body: |
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bb.0:
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; CHECK-LABEL: name: abs_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 31
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; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s64)
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; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[ASHR]]
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; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[ADD]], [[ASHR]]
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; CHECK: $w0 = COPY [[XOR]](s32)
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%0:_(s32) = COPY $w0
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%1:_(s32) = G_ABS %0(s32)
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$w0 = COPY %1(s32)
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...
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---
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name: abs_s64
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liveins:
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body: |
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bb.0:
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; CHECK-LABEL: name: abs_s64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
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; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[COPY]], [[C]](s64)
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; CHECK: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[ASHR]]
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; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[ADD]], [[ASHR]]
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; CHECK: $x0 = COPY [[XOR]](s64)
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%0:_(s64) = COPY $x0
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%1:_(s64) = G_ABS %0(s64)
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$x0 = COPY %1(s64)
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...
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@ -497,8 +497,8 @@
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: G_ABS (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
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# DEBUG-NEXT: G_BR (opcode {{[0-9]+}}): 0 type indices, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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