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Never delete instructions that define reserved registers. 

I think this was already the intention, but DeadMachineInstructionElim
was accidentally tracking the liveness of reserved registers. Now,
instructions with reserved defs are never deleted.

This prevents the call stack adjustment instructions from getting
deleted when enabling register masks.

llvm-svn: 150116
This commit is contained in:
Jakob Stoklund Olesen 2012-02-09 00:15:39 +00:00
parent a1b227b6a7
commit 5d33291e8e
1 changed files with 10 additions and 6 deletions
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16
llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
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@ -33,6 +33,7 @@ namespace {
const MachineRegisterInfo *MRI; const MachineRegisterInfo *MRI;
const TargetInstrInfo *TII; const TargetInstrInfo *TII;
BitVector LivePhysRegs; BitVector LivePhysRegs;
BitVector ReservedRegs;
public: public:
static char ID; // Pass identification, replacement for typeid static char ID; // Pass identification, replacement for typeid
@ -67,10 +68,14 @@ bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
const MachineOperand &MO = MI->getOperand(i); const MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef()) { if (MO.isReg() && MO.isDef()) {
unsigned Reg = MO.getReg(); unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg) ? if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
LivePhysRegs[Reg] : !MRI->use_nodbg_empty(Reg)) { // Don't delete live physreg defs, or any reserved register defs.
// This def has a non-debug use. Don't delete the instruction! if (LivePhysRegs.test(Reg) || ReservedRegs.test(Reg))
return false; return false;
} else {
if (!MRI->use_nodbg_empty(Reg))
// This def has a non-debug use. Don't delete the instruction!
return false;
} }
} }
} }
@ -86,7 +91,7 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
TII = MF.getTarget().getInstrInfo(); TII = MF.getTarget().getInstrInfo();
// Treat reserved registers as always live. // Treat reserved registers as always live.
BitVector ReservedRegs = TRI->getReservedRegs(MF); ReservedRegs = TRI->getReservedRegs(MF);
// Loop over all instructions in all blocks, from bottom to top, so that it's // Loop over all instructions in all blocks, from bottom to top, so that it's
// more likely that chains of dependent but ultimately dead instructions will // more likely that chains of dependent but ultimately dead instructions will
@ -173,7 +178,6 @@ bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
} else if (MO.isRegMask()) { } else if (MO.isRegMask()) {
// Register mask of preserved registers. All clobbers are dead. // Register mask of preserved registers. All clobbers are dead.
LivePhysRegs.clearBitsNotInMask(MO.getRegMask()); LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
LivePhysRegs |= ReservedRegs;
} }
} }
// Record the physreg uses, after the defs, in case a physreg is // Record the physreg uses, after the defs, in case a physreg is