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RegisterCoalescer: Fix implicit def handling in register coalescer 

If liveranges induced by an IMPLICIT_DEF get completely covered by a
proper liverange the IMPLICIT_DEF instructions and its corresponding
definitions have to be removed from the live ranges. This has to happen
in the subregister live ranges as well (I didn't see this case earlier
because in most programs only some subregisters are covered and the
IMPLCIT_DEF won't get removed).

No testcase, I spent hours trying to create one for one of the public
targets, but ultimately failed because I couldn't manage to properly
control the placement of COPY and IMPLICIT_DEF instructions from an .ll
file.

llvm-svn: 233217
This commit is contained in:
Matthias Braun 2015-03-25 21:18:24 +00:00
parent e962e52a45
commit 5d27ef6449
1 changed files with 23 additions and 1 deletions
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24
llvm/lib/CodeGen/RegisterCoalescer.cpp
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@ -1758,6 +1758,9 @@ public:
void eraseInstrs(SmallPtrSetImpl<MachineInstr*> &ErasedInstrs, void eraseInstrs(SmallPtrSetImpl<MachineInstr*> &ErasedInstrs,
SmallVectorImpl<unsigned> &ShrinkRegs); SmallVectorImpl<unsigned> &ShrinkRegs);
/// Remove liverange defs at places where implicit defs will be removed.
void removeImplicitDefs();
/// Get the value assignments suitable for passing to LiveInterval::join. /// Get the value assignments suitable for passing to LiveInterval::join.
const int *getAssignments() const { return Assignments.data(); } const int *getAssignments() const { return Assignments.data(); }
}; };
@ -1858,7 +1861,11 @@ JoinVals::analyzeValue(unsigned ValNo, JoinVals &Other) {
assert(DefMI != nullptr); assert(DefMI != nullptr);
if (SubRangeJoin) { if (SubRangeJoin) {
// We don't care about the lanes when joining subregister ranges. // We don't care about the lanes when joining subregister ranges.
V.ValidLanes = V.WriteLanes = 1; V.WriteLanes = V.ValidLanes = 1;
if (DefMI->isImplicitDef()) {
V.ValidLanes = 0;
V.ErasableImplicitDef = true;
}
} else { } else {
bool Redef = false; bool Redef = false;
V.ValidLanes = V.WriteLanes = computeWriteLanes(DefMI, Redef); V.ValidLanes = V.WriteLanes = computeWriteLanes(DefMI, Redef);
@ -2341,6 +2348,18 @@ void JoinVals::pruneSubRegValues(LiveInterval &LI, unsigned &ShrinkMask)
LI.removeEmptySubRanges(); LI.removeEmptySubRanges();
} }
void JoinVals::removeImplicitDefs() {
for (unsigned i = 0, e = LR.getNumValNums(); i != e; ++i) {
Val &V = Vals[i];
if (V.Resolution != CR_Keep || !V.ErasableImplicitDef || !V.Pruned)
continue;
VNInfo *VNI = LR.getValNumInfo(i);
VNI->markUnused();
LR.removeValNo(VNI);
}
}
void JoinVals::eraseInstrs(SmallPtrSetImpl<MachineInstr*> &ErasedInstrs, void JoinVals::eraseInstrs(SmallPtrSetImpl<MachineInstr*> &ErasedInstrs,
SmallVectorImpl<unsigned> &ShrinkRegs) { SmallVectorImpl<unsigned> &ShrinkRegs) {
for (unsigned i = 0, e = LR.getNumValNums(); i != e; ++i) { for (unsigned i = 0, e = LR.getNumValNums(); i != e; ++i) {
@ -2416,6 +2435,9 @@ bool RegisterCoalescer::joinSubRegRanges(LiveRange &LRange, LiveRange &RRange,
LHSVals.pruneValues(RHSVals, EndPoints, false); LHSVals.pruneValues(RHSVals, EndPoints, false);
RHSVals.pruneValues(LHSVals, EndPoints, false); RHSVals.pruneValues(LHSVals, EndPoints, false);
LHSVals.removeImplicitDefs();
RHSVals.removeImplicitDefs();
LRange.verify(); LRange.verify();
RRange.verify(); RRange.verify();