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Don't forget subreg indices when folding load / store. 

llvm-svn: 85048
This commit is contained in:
Evan Cheng 2009-10-25 07:52:27 +00:00
parent 4c799e65d7
commit 5d1b849658
1 changed files with 30 additions and 10 deletions
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40
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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@ -750,18 +750,24 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
unsigned PredReg = MI->getOperand(3).getReg(); unsigned PredReg = MI->getOperand(3).getReg();
if (OpNum == 0) { // move -> store if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg(); unsigned SrcReg = MI->getOperand(1).getReg();
unsigned SrcSubReg = MI->getOperand(1).getSubReg();
bool isKill = MI->getOperand(1).isKill(); bool isKill = MI->getOperand(1).isKill();
bool isUndef = MI->getOperand(1).isUndef(); bool isUndef = MI->getOperand(1).isUndef();
if (Opc == ARM::MOVr) if (Opc == ARM::MOVr)
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::STR)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::STR))
.addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addReg(SrcReg,
getKillRegState(isKill) | getUndefRegState(isUndef),
SrcSubReg)
.addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg);
else // ARM::t2MOVr else // ARM::t2MOVr
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2STRi12)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2STRi12))
.addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addReg(SrcReg,
getKillRegState(isKill) | getUndefRegState(isUndef),
SrcSubReg)
.addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
} else { // move -> load } else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg(); unsigned DstReg = MI->getOperand(0).getReg();
unsigned DstSubReg = MI->getOperand(0).getSubReg();
bool isDead = MI->getOperand(0).isDead(); bool isDead = MI->getOperand(0).isDead();
bool isUndef = MI->getOperand(0).isUndef(); bool isUndef = MI->getOperand(0).isUndef();
if (Opc == ARM::MOVr) if (Opc == ARM::MOVr)
@ -769,14 +775,14 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
.addReg(DstReg, .addReg(DstReg,
RegState::Define | RegState::Define |
getDeadRegState(isDead) | getDeadRegState(isDead) |
getUndefRegState(isUndef)) getUndefRegState(isUndef), DstSubReg)
.addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addReg(0).addImm(0).addImm(Pred).addReg(PredReg);
else // ARM::t2MOVr else // ARM::t2MOVr
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2LDRi12)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2LDRi12))
.addReg(DstReg, .addReg(DstReg,
RegState::Define | RegState::Define |
getDeadRegState(isDead) | getDeadRegState(isDead) |
getUndefRegState(isUndef)) getUndefRegState(isUndef), DstSubReg)
.addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
} }
} else if (Opc == ARM::tMOVgpr2gpr || } else if (Opc == ARM::tMOVgpr2gpr ||
@ -784,20 +790,25 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
Opc == ARM::tMOVgpr2tgpr) { Opc == ARM::tMOVgpr2tgpr) {
if (OpNum == 0) { // move -> store if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg(); unsigned SrcReg = MI->getOperand(1).getReg();
unsigned SrcSubReg = MI->getOperand(1).getSubReg();
bool isKill = MI->getOperand(1).isKill(); bool isKill = MI->getOperand(1).isKill();
bool isUndef = MI->getOperand(1).isUndef(); bool isUndef = MI->getOperand(1).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2STRi12)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2STRi12))
.addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addReg(SrcReg,
getKillRegState(isKill) | getUndefRegState(isUndef),
SrcSubReg)
.addFrameIndex(FI).addImm(0).addImm(ARMCC::AL).addReg(0); .addFrameIndex(FI).addImm(0).addImm(ARMCC::AL).addReg(0);
} else { // move -> load } else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg(); unsigned DstReg = MI->getOperand(0).getReg();
unsigned DstSubReg = MI->getOperand(0).getSubReg();
bool isDead = MI->getOperand(0).isDead(); bool isDead = MI->getOperand(0).isDead();
bool isUndef = MI->getOperand(0).isUndef(); bool isUndef = MI->getOperand(0).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2LDRi12)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::t2LDRi12))
.addReg(DstReg, .addReg(DstReg,
RegState::Define | RegState::Define |
getDeadRegState(isDead) | getDeadRegState(isDead) |
getUndefRegState(isUndef)) getUndefRegState(isUndef),
DstSubReg)
.addFrameIndex(FI).addImm(0).addImm(ARMCC::AL).addReg(0); .addFrameIndex(FI).addImm(0).addImm(ARMCC::AL).addReg(0);
} }
} else if (Opc == ARM::FCPYS) { } else if (Opc == ARM::FCPYS) {
@ -805,21 +816,25 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
unsigned PredReg = MI->getOperand(3).getReg(); unsigned PredReg = MI->getOperand(3).getReg();
if (OpNum == 0) { // move -> store if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg(); unsigned SrcReg = MI->getOperand(1).getReg();
unsigned SrcSubReg = MI->getOperand(1).getSubReg();
bool isKill = MI->getOperand(1).isKill(); bool isKill = MI->getOperand(1).isKill();
bool isUndef = MI->getOperand(1).isUndef(); bool isUndef = MI->getOperand(1).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTS)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTS))
.addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef),
SrcSubReg)
.addFrameIndex(FI) .addFrameIndex(FI)
.addImm(0).addImm(Pred).addReg(PredReg); .addImm(0).addImm(Pred).addReg(PredReg);
} else { // move -> load } else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg(); unsigned DstReg = MI->getOperand(0).getReg();
unsigned DstSubReg = MI->getOperand(0).getSubReg();
bool isDead = MI->getOperand(0).isDead(); bool isDead = MI->getOperand(0).isDead();
bool isUndef = MI->getOperand(0).isUndef(); bool isUndef = MI->getOperand(0).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDS)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDS))
.addReg(DstReg, .addReg(DstReg,
RegState::Define | RegState::Define |
getDeadRegState(isDead) | getDeadRegState(isDead) |
getUndefRegState(isUndef)) getUndefRegState(isUndef),
DstSubReg)
.addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
} }
} }
@ -828,20 +843,25 @@ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
unsigned PredReg = MI->getOperand(3).getReg(); unsigned PredReg = MI->getOperand(3).getReg();
if (OpNum == 0) { // move -> store if (OpNum == 0) { // move -> store
unsigned SrcReg = MI->getOperand(1).getReg(); unsigned SrcReg = MI->getOperand(1).getReg();
unsigned SrcSubReg = MI->getOperand(1).getSubReg();
bool isKill = MI->getOperand(1).isKill(); bool isKill = MI->getOperand(1).isKill();
bool isUndef = MI->getOperand(1).isUndef(); bool isUndef = MI->getOperand(1).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTD)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FSTD))
.addReg(SrcReg, getKillRegState(isKill) | getUndefRegState(isUndef)) .addReg(SrcReg,
getKillRegState(isKill) | getUndefRegState(isUndef),
SrcSubReg)
.addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
} else { // move -> load } else { // move -> load
unsigned DstReg = MI->getOperand(0).getReg(); unsigned DstReg = MI->getOperand(0).getReg();
unsigned DstSubReg = MI->getOperand(0).getSubReg();
bool isDead = MI->getOperand(0).isDead(); bool isDead = MI->getOperand(0).isDead();
bool isUndef = MI->getOperand(0).isUndef(); bool isUndef = MI->getOperand(0).isUndef();
NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDD)) NewMI = BuildMI(MF, MI->getDebugLoc(), get(ARM::FLDD))
.addReg(DstReg, .addReg(DstReg,
RegState::Define | RegState::Define |
getDeadRegState(isDead) | getDeadRegState(isDead) |
getUndefRegState(isUndef)) getUndefRegState(isUndef),
DstSubReg)
.addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg); .addFrameIndex(FI).addImm(0).addImm(Pred).addReg(PredReg);
} }
} }