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[TargetLowering] Add i1 condition for bit comparison fold 

For i1 types, boolean false is represented identically regardless of
the boolean content, so we can allow optimizations that otherwise
would not be correct for booleans with false represented as a negative
one.

Patch by Erik Hogeman.

Differential Revision: https://reviews.llvm.org/D90145
This commit is contained in:
Sven van Haastregt 2020-10-27 12:21:40 +00:00
parent 2107e4b10e
commit 5d03080092
2 changed files with 12 additions and 8 deletions
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8
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -3980,8 +3980,12 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
const APInt &C1 = N1C->getAPIntValue();
EVT ShValTy = N0.getValueType();
// Fold bit comparisons when we can.
if (getBooleanContents(N0.getValueType()) == ZeroOrOneBooleanContent &&
// Fold bit comparisons when we can. This will result in an
// incorrect value when boolean false is negative one, unless
// the bitsize is 1 in which case the false value is the same
// in practice regardless of the representation.
if ((VT.getSizeInBits() == 1 ||
getBooleanContents(N0.getValueType()) == ZeroOrOneBooleanContent) &&
(Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
(VT == ShValTy || (isTypeLegal(VT) && VT.bitsLE(ShValTy))) &&
N0.getOpcode() == ISD::AND) {

12
llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
View File

@ -3,14 +3,14 @@
; Tests the following pattern:
; (X & 8) != 0 --> (X & 8) >> 3
; This produces incorrect code when boolean false is represented
; as a negative one, and this test checks that the transform is
; not triggered.
; This produces incorrect code in general when boolean false is
; represented as a negative one. There is however a special
; case when the type has a bitsize of 1, for which the false
; value will be identical regardless of the boolean representation.
; Check that the optimization triggers in this case.
; CHECK-LABEL: @pow2_mask_cmp
; CHECK: and.b32 [[AND:%r[0-9]+]], %r{{[0-9]+}}, 8
; CHECK: setp.ne.s32 [[SETP:%p[0-9+]]], [[AND]], 0
; CHECK: selp.u32 %r{{[0-9]+}}, 1, 0, [[SETP]]
; CHECK: bfe.u32 {{%r[0-9]+}}, {{%r[0-9]+}}, 3, 1
define i32 @pow2_mask_cmp(i32 %x) {
%a = and i32 %x, 8
%cmp = icmp ne i32 %a, 0