forked from OSchip/llvm-project
Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc.
Support single-fp incoming args. Support single-fp outgoing args ('call' operands). Support double-fp return values. llvm-svn: 14880
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5ce1408537
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@ -302,14 +302,34 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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}
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}
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}
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}
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void V8ISel::LoadArgumentsToVirtualRegs (Function *F) {
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void V8ISel::LoadArgumentsToVirtualRegs (Function *LF) {
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unsigned ArgOffset = 0;
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unsigned ArgOffset;
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static const unsigned IncomingArgRegs[] = { V8::I0, V8::I1, V8::I2,
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static const unsigned IncomingArgRegs[] = { V8::I0, V8::I1, V8::I2,
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V8::I3, V8::I4, V8::I5 };
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V8::I3, V8::I4, V8::I5 };
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assert (F->asize () < 7
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assert (LF->asize () < 7
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&& "Can't handle loading excess call args off the stack yet");
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&& "Can't handle loading excess call args off the stack yet");
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for (Function::aiterator I = F->abegin(), E = F->aend(); I != E; ++I) {
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// Add IMPLICIT_DEFs of input regs.
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ArgOffset = 0;
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for (Function::aiterator I = LF->abegin(), E = LF->aend(); I != E; ++I) {
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unsigned Reg = getReg(*I);
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switch (getClassB(I->getType())) {
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case cByte:
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case cShort:
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case cInt:
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case cFloat:
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BuildMI(BB, V8::IMPLICIT_DEF, 0, IncomingArgRegs[ArgOffset]);
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break;
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default:
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// FIXME: handle cDouble, cLong
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assert (0 && "64-bit (double, long, etc.) function args not handled");
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return;
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}
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++ArgOffset;
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}
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ArgOffset = 0;
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for (Function::aiterator I = LF->abegin(), E = LF->aend(); I != E; ++I) {
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unsigned Reg = getReg(*I);
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unsigned Reg = getReg(*I);
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switch (getClassB(I->getType())) {
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switch (getClassB(I->getType())) {
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case cByte:
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case cByte:
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@ -318,12 +338,24 @@ void V8ISel::LoadArgumentsToVirtualRegs (Function *F) {
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BuildMI(BB, V8::ORrr, 2, Reg).addReg (V8::G0)
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BuildMI(BB, V8::ORrr, 2, Reg).addReg (V8::G0)
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.addReg (IncomingArgRegs[ArgOffset]);
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.addReg (IncomingArgRegs[ArgOffset]);
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break;
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break;
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case cFloat: {
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// Single-fp args are passed in integer registers; go through
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// memory to get them into FP registers. (Bleh!)
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unsigned FltAlign = TM.getTargetData().getFloatAlignment();
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int FI = F->getFrameInfo()->CreateStackObject(4, FltAlign);
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BuildMI (BB, V8::ST, 3).addFrameIndex (FI).addSImm (0)
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.addReg (IncomingArgRegs[ArgOffset]);
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BuildMI (BB, V8::LDFri, 2, Reg).addFrameIndex (FI).addSImm (0);
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break;
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}
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default:
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default:
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assert (0 && "Only <=32-bit, integral arguments currently handled");
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// FIXME: handle cDouble, cLong
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assert (0 && "64-bit (double, long, etc.) function args not handled");
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return;
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return;
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}
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}
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++ArgOffset;
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++ArgOffset;
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}
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}
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}
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}
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void V8ISel::SelectPHINodes() {
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void V8ISel::SelectPHINodes() {
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@ -668,12 +700,23 @@ void V8ISel::visitCallInst(CallInst &I) {
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V8::O4, V8::O5 };
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V8::O4, V8::O5 };
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for (unsigned i = 1; i < 7; ++i)
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for (unsigned i = 1; i < 7; ++i)
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if (i < I.getNumOperands ()) {
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if (i < I.getNumOperands ()) {
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assert (getClassB (I.getOperand (i)->getType ()) < cLong
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&& "Can't handle long or fp function call arguments yet");
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unsigned ArgReg = getReg (I.getOperand (i));
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unsigned ArgReg = getReg (I.getOperand (i));
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// Schlep it over into the incoming arg register
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if (getClassB (I.getOperand (i)->getType ()) < cLong) {
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BuildMI (BB, V8::ORrr, 2, OutgoingArgRegs[i - 1]).addReg (V8::G0)
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// Schlep it over into the incoming arg register
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.addReg (ArgReg);
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BuildMI (BB, V8::ORrr, 2, OutgoingArgRegs[i - 1]).addReg (V8::G0)
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.addReg (ArgReg);
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} else if (getClassB (I.getOperand (i)->getType ()) == cFloat) {
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// Single-fp args are passed in integer registers; go through
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// memory to get them out of FP registers. (Bleh!)
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unsigned FltAlign = TM.getTargetData().getFloatAlignment();
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int FI = F->getFrameInfo()->CreateStackObject(4, FltAlign);
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BuildMI (BB, V8::STFri, 3).addFrameIndex (FI).addSImm (0)
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.addReg (ArgReg);
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BuildMI (BB, V8::LD, 2, OutgoingArgRegs[i - 1]).addFrameIndex (FI)
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.addSImm (0);
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} else {
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assert (0 && "64-bit (double, long, etc.) 'call' opnds not handled");
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}
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}
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}
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// Emit call instruction
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// Emit call instruction
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@ -716,6 +759,14 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
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case cFloat:
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case cFloat:
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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break;
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break;
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case cDouble: {
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unsigned DoubleAlignment = TM.getTargetData().getDoubleAlignment();
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int FI = F->getFrameInfo()->CreateStackObject(8, DoubleAlignment);
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BuildMI (BB, V8::STDFri, 3).addFrameIndex (FI).addSImm (0)
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.addReg (RetValReg);
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BuildMI (BB, V8::LDDFri, 2, V8::F0).addFrameIndex (FI).addSImm (0);
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break;
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}
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case cLong:
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case cLong:
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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