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Tweaks to the icmp+sext-to-shifts optimization to address Frits' comments: 

- Localize the check if an icmp has one use to a place where we know we're
  introducing something that's likely more expensive than a sext from i1.
- Add an assert to make sure a case that would lead to a miscompilation is
  folded away earlier.
- Fix a typo.

llvm-svn: 128744
This commit is contained in:
Benjamin Kramer 2011-04-01 22:22:11 +00:00
parent 88530e6568
commit 5cad45307e
1 changed files with 6 additions and 6 deletions
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12
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
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@ -882,10 +882,6 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
Value *Op0 = ICI->getOperand(0), *Op1 = ICI->getOperand(1); Value *Op0 = ICI->getOperand(0), *Op1 = ICI->getOperand(1);
ICmpInst::Predicate Pred = ICI->getPredicate(); ICmpInst::Predicate Pred = ICI->getPredicate();
// Transforming icmps with more than one use is not profitable.
if (!ICI->hasOneUse())
return 0;
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) { if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
// (x <s 0) ? -1 : 0 -> ashr x, 31 -> all ones if signed // (x <s 0) ? -1 : 0 -> ashr x, 31 -> all ones if signed
// (x >s -1) ? -1 : 0 -> ashr x, 31 -> all ones if not signed // (x >s -1) ? -1 : 0 -> ashr x, 31 -> all ones if not signed
@ -906,7 +902,8 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
// If we know that only one bit of the LHS of the icmp can be set and we // If we know that only one bit of the LHS of the icmp can be set and we
// have an equality comparison with zero or a power of 2, we can transform // have an equality comparison with zero or a power of 2, we can transform
// the icmp and sext into bitwise/integer operations. // the icmp and sext into bitwise/integer operations.
if (ICI->isEquality() && (Op1C->isZero() || Op1C->getValue().isPowerOf2())){ if (ICI->hasOneUse() &&
ICI->isEquality() && (Op1C->isZero() || Op1C->getValue().isPowerOf2())){
unsigned BitWidth = Op1C->getType()->getBitWidth(); unsigned BitWidth = Op1C->getType()->getBitWidth();
APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0); APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
APInt TypeMask(APInt::getAllOnesValue(BitWidth)); APInt TypeMask(APInt::getAllOnesValue(BitWidth));
@ -916,6 +913,9 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
if (KnownZeroMask.isPowerOf2()) { if (KnownZeroMask.isPowerOf2()) {
Value *In = ICI->getOperand(0); Value *In = ICI->getOperand(0);
assert((Op1C->isZero() || Op1C->getValue() == KnownZeroMask) &&
"Constant icmp not folded?");
if (!Op1C->isZero() == (Pred == ICmpInst::ICMP_NE)) { if (!Op1C->isZero() == (Pred == ICmpInst::ICMP_NE)) {
// sext ((x & 2^n) == 0) -> (x >> n) - 1 // sext ((x & 2^n) == 0) -> (x >> n) - 1
// sext ((x & 2^n) != 2^n) -> (x >> n) - 1 // sext ((x & 2^n) != 2^n) -> (x >> n) - 1
@ -932,7 +932,7 @@ Instruction *InstCombiner::transformSExtICmp(ICmpInst *ICI, Instruction &CI) {
"sext"); "sext");
} else { } else {
// sext ((x & 2^n) != 0) -> (x << bitwidth-n) a>> bitwidth-1 // sext ((x & 2^n) != 0) -> (x << bitwidth-n) a>> bitwidth-1
// sext ((x & 2^n) != 2^n) -> (x << bitwidth-n) a>> bitwidth-1 // sext ((x & 2^n) == 2^n) -> (x << bitwidth-n) a>> bitwidth-1
unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); unsigned ShiftAmt = KnownZeroMask.countLeadingZeros();
// Perform a left shift to place the desired bit in the MSB. // Perform a left shift to place the desired bit in the MSB.
if (ShiftAmt) if (ShiftAmt)