forked from OSchip/llvm-project
LegalizeDAG: Expand ctlz with ctlz_zero_undef if legal
llvm-svn: 257345
This commit is contained in:
Matt Arsenault
parent
02d45dfeda
commit
5ca3c72c5a
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@ -2941,6 +2941,18 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
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// This trivially expands to CTLZ.
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return DAG.getNode(ISD::CTLZ, dl, Op.getValueType(), Op);
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case ISD::CTLZ: {
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EVT VT = Op.getValueType();
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unsigned len = VT.getSizeInBits();
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if (TLI.isOperationLegalOrCustom(ISD::CTLZ_ZERO_UNDEF, VT)) {
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EVT SetCCVT = getSetCCResultType(VT);
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SDValue CTLZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, dl, VT, Op);
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SDValue Zero = DAG.getConstant(0, dl, VT);
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SDValue SrcIsZero = DAG.getSetCC(dl, SetCCVT, Op, Zero, ISD::SETEQ);
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return DAG.getNode(ISD::SELECT, dl, VT, SrcIsZero,
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DAG.getConstant(len, dl, VT), CTLZ);
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}
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// for now, we do this:
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// x = x | (x >> 1);
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// x = x | (x >> 2);
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@ -2950,9 +2962,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
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// return popcount(~x);
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//
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// Ref: "Hacker's Delight" by Henry Warren
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EVT VT = Op.getValueType();
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EVT ShVT = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
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unsigned len = VT.getSizeInBits();
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for (unsigned i = 0; (1U << i) <= (len / 2); ++i) {
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SDValue Tmp3 = DAG.getConstant(1ULL << i, dl, ShVT);
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Op = DAG.getNode(ISD::OR, dl, VT, Op,
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@ -288,6 +288,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM,
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if (!Subtarget->hasFFBL())
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand);
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setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
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setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand);
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static const MVT::SimpleValueType VectorIntTypes[] = {
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MVT::v2i32, MVT::v4i32
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};
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@ -0,0 +1,131 @@
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; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
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declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) nounwind readnone
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declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1) nounwind readnone
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declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
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declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone
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declare <4 x i64> @llvm.ctlz.v4i64(<4 x i64>, i1) nounwind readnone
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; FUNC-LABEL: {{^}}s_ctlz_i32:
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; SI: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}}
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; SI-DAG: s_flbit_i32_b32 [[CTLZ:s[0-9]+]], [[VAL]]
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; SI-DAG: v_cmp_eq_i32_e64 [[CMPZ:s\[[0-9]+:[0-9]+\]]], 0, [[VAL]]
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; SI-DAG: v_mov_b32_e32 [[VCTLZ:v[0-9]+]], [[CTLZ]]
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; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[VCTLZ]], 32, [[CMPZ]]
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; SI: buffer_store_dword [[RESULT]]
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; SI: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @s_ctlz_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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store i32 %ctlz, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i32:
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; SI: buffer_load_dword [[VAL:v[0-9]+]],
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; SI-DAG: v_ffbh_u32_e32 [[CTLZ:v[0-9]+]], [[VAL]]
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; SI-DAG: v_cmp_eq_i32_e32 vcc, 0, [[CTLZ]]
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; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], [[CTLZ]], 32, vcc
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; SI: buffer_store_dword [[RESULT]],
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; SI: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @v_ctlz_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %valptr) nounwind {
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%val = load i32, i32 addrspace(1)* %valptr, align 4
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%ctlz = call i32 @llvm.ctlz.i32(i32 %val, i1 false) nounwind readnone
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store i32 %ctlz, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_v2i32:
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; SI: buffer_load_dwordx2
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; SI: v_ffbh_u32_e32
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; SI: v_ffbh_u32_e32
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; SI: buffer_store_dwordx2
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; SI: s_endpgm
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; EG: FFBH_UINT
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; EG: CNDE_INT
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; EG: FFBH_UINT
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; EG: CNDE_INT
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define void @v_ctlz_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %valptr) nounwind {
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%val = load <2 x i32>, <2 x i32> addrspace(1)* %valptr, align 8
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%ctlz = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %val, i1 false) nounwind readnone
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store <2 x i32> %ctlz, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_v4i32:
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; SI: buffer_load_dwordx4
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; SI: v_ffbh_u32_e32
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; SI: v_ffbh_u32_e32
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; SI: v_ffbh_u32_e32
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; SI: v_ffbh_u32_e32
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; SI: buffer_store_dwordx4
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; SI: s_endpgm
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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; EG-DAG: FFBH_UINT
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; EG-DAG: CNDE_INT
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define void @v_ctlz_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %valptr) nounwind {
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%val = load <4 x i32>, <4 x i32> addrspace(1)* %valptr, align 16
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%ctlz = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %val, i1 false) nounwind readnone
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store <4 x i32> %ctlz, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; FUNC-LABEL: {{^}}s_ctlz_i64:
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define void @s_ctlz_i64(i64 addrspace(1)* noalias %out, i64 %val) nounwind {
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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store i64 %ctlz, i64 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}s_ctlz_i64_trunc:
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define void @s_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 %val) nounwind {
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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%trunc = trunc i64 %ctlz to i32
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store i32 %trunc, i32 addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i64:
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define void @v_ctlz_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %tid
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%val = load i64, i64 addrspace(1)* %in.gep
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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store i64 %ctlz, i64 addrspace(1)* %out.gep
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ret void
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}
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; FUNC-LABEL: {{^}}v_ctlz_i64_trunc:
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define void @v_ctlz_i64_trunc(i32 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %in) nounwind {
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%tid = call i32 @llvm.r600.read.tidig.x()
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%in.gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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%val = load i64, i64 addrspace(1)* %in.gep
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%ctlz = call i64 @llvm.ctlz.i64(i64 %val, i1 false)
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%trunc = trunc i64 %ctlz to i32
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store i32 %trunc, i32 addrspace(1)* %out.gep
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ret void
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}
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