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AMDGPU: Remove pointless asserts 

llvm-svn: 310007
This commit is contained in:
Matt Arsenault 2017-08-04 00:00:13 +00:00
parent b72e35a4c4
commit 5c921a9291
1 changed files with 0 additions and 3 deletions
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3
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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@ -1079,7 +1079,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
if (Info.hasWorkItemIDX()) { if (Info.hasWorkItemIDX()) {
unsigned Reg = AMDGPU::VGPR0; unsigned Reg = AMDGPU::VGPR0;
MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass); MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
assert(Reg == AMDGPU::VGPR0);
CCInfo.AllocateReg(Reg); CCInfo.AllocateReg(Reg);
Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg)); Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg));
@ -1089,7 +1088,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
unsigned Reg = AMDGPU::VGPR1; unsigned Reg = AMDGPU::VGPR1;
MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass); MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
assert(Reg == AMDGPU::VGPR1);
CCInfo.AllocateReg(Reg); CCInfo.AllocateReg(Reg);
Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg));
} }
@ -1098,7 +1096,6 @@ static void allocateSpecialEntryInputVGPRs(CCState &CCInfo,
unsigned Reg = AMDGPU::VGPR2; unsigned Reg = AMDGPU::VGPR2;
MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass); MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
assert(Reg == AMDGPU::VGPR2);
CCInfo.AllocateReg(Reg); CCInfo.AllocateReg(Reg);
Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg));
} }