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mips32 long long register inline asm constraint support. 

inlineasm-cnstrnt-bad-r-1.ll is NOT supposed to fail, so it was removed.    This resulted in the removal of a negative test (inlineasm-cnstrnt-bad-r-1.ll)
    

llvm-svn: 159610
This commit is contained in:
Jack Carter 2012-07-02 22:39:45 +00:00
parent ab0d4e6cd8
commit 5c1a01a625
2 changed files with 8 additions and 0 deletions
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2
llvm/lib/Target/Mips/MipsISelLowering.cpp
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@ -3355,6 +3355,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
case 'r':
if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8)
return std::make_pair(0U, &Mips::CPURegsRegClass);
if (VT == MVT::i64 && !HasMips64)
return std::make_pair(0U, &Mips::CPURegsRegClass);
if (VT == MVT::i64 && HasMips64)
return std::make_pair(0U, &Mips::CPU64RegsRegClass);
// This will generate an error message

6
llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
View File

@ -41,5 +41,11 @@ entry:
;CHECK: #NO_APP
tail call i32 asm sideeffect "addi $0,$1,${2:z}", "=r,r,I"(i32 7, i32 0) nounwind
; a long long in 32 bit mode (use to assert)
;CHECK: #APP
;CHECK: addi ${{[0-9]+}},${{[0-9]+}},3
;CHECK: #NO_APP
tail call i64 asm sideeffect "addi $0,$1,$2 \0A\09", "=r,r,X"(i64 1229801703532086340, i64 3) nounwind
ret i32 0
}