forked from OSchip/llvm-project
[Hexagon] Cache reached blocks in bit tracker instead of scanning list
llvm-svn: 300701
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@ -1011,12 +1011,7 @@ void BT::subst(RegisterRef OldRR, RegisterRef NewRR) {
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bool BT::reached(const MachineBasicBlock *B) const {
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int BN = B->getNumber();
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assert(BN >= 0);
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for (EdgeSetType::iterator I = EdgeExec.begin(), E = EdgeExec.end();
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I != E; ++I) {
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if (I->second == BN)
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return true;
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}
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return false;
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return ReachedBB.count(BN);
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}
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// Visit an individual instruction. This could be a newly added instruction,
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@ -1036,6 +1031,8 @@ void BT::reset() {
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EdgeExec.clear();
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InstrExec.clear();
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Map.clear();
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ReachedBB.clear();
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ReachedBB.reserve(MF.size());
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}
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void BT::run() {
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@ -1068,6 +1065,7 @@ void BT::run() {
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if (EdgeExec.count(Edge))
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continue;
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EdgeExec.insert(Edge);
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ReachedBB.insert(Edge.second);
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const MachineBasicBlock &B = *MF.getBlockNumbered(Edge.second);
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MachineBasicBlock::const_iterator It = B.begin(), End = B.end();
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@ -10,6 +10,7 @@
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#ifndef LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H
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#define LLVM_LIB_TARGET_HEXAGON_BITTRACKER_H
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunction.h"
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@ -68,10 +69,11 @@ private:
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typedef std::set<const MachineInstr *> InstrSetType;
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typedef std::queue<CFGEdge> EdgeQueueType;
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EdgeSetType EdgeExec; // Executable flow graph edges.
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InstrSetType InstrExec; // Executable instructions.
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EdgeQueueType FlowQ; // Work queue of CFG edges.
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bool Trace; // Enable tracing for debugging.
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EdgeSetType EdgeExec; // Executable flow graph edges.
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InstrSetType InstrExec; // Executable instructions.
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EdgeQueueType FlowQ; // Work queue of CFG edges.
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DenseSet<unsigned> ReachedBB; // Cache of reached blocks.
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bool Trace; // Enable tracing for debugging.
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const MachineEvaluator &ME;
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MachineFunction &MF;
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