forked from OSchip/llvm-project
parent
11cf053bd1
commit
5bdb95c078
llvm/test/CodeGen/X86
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@ -1,4 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
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define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
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@ -9,7 +9,6 @@ define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
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; CHECK-NEXT: vpsraw $15, %ymm0, %ymm0
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; CHECK-NEXT: vpblendvb %ymm0, %ymm1, %ymm2, %ymm0
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; CHECK-NEXT: retq
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;
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%ret = select <16 x i1> %mask, <16 x i16> %x, <16 x i16> %y
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ret <16 x i16> %ret
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}
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