forked from OSchip/llvm-project
[ARM] Additional test for tailpred reductions. NFC
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@ -597,6 +597,118 @@ for.cond.cleanup: ; preds = %middle.block, %entr
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ret void
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}
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%struct.date = type { i32, i32, i32, i32 }
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@days = internal unnamed_addr constant [2 x [13 x i32]] [[13 x i32] [i32 0, i32 31, i32 28, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31], [13 x i32] [i32 0, i32 31, i32 29, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31]], align 4
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define i32 @wrongop(%struct.date* nocapture readonly %pd) {
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; CHECK-LABEL: wrongop:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: mov r12, r0
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; CHECK-NEXT: ldr r0, [r0]
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; CHECK-NEXT: ldr.w r2, [r12, #8]
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; CHECK-NEXT: lsls r3, r2, #30
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; CHECK-NEXT: bne .LBB8_3
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; CHECK-NEXT: @ %bb.1: @ %entry
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; CHECK-NEXT: movw r3, #34079
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; CHECK-NEXT: movt r3, #20971
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; CHECK-NEXT: smmul r3, r2, r3
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; CHECK-NEXT: asrs r1, r3, #5
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; CHECK-NEXT: add.w r1, r1, r3, lsr #31
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; CHECK-NEXT: movs r3, #100
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; CHECK-NEXT: mls r1, r1, r3, r2
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; CHECK-NEXT: cbz r1, .LBB8_3
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; CHECK-NEXT: @ %bb.2:
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; CHECK-NEXT: movs r4, #1
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; CHECK-NEXT: b .LBB8_4
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; CHECK-NEXT: .LBB8_3: @ %lor.rhs
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; CHECK-NEXT: movw r1, #47184
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; CHECK-NEXT: movw r3, #23593
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; CHECK-NEXT: movt r1, #1310
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; CHECK-NEXT: movt r3, #49807
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; CHECK-NEXT: mla r1, r2, r3, r1
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; CHECK-NEXT: movw r2, #55051
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; CHECK-NEXT: movt r2, #163
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; CHECK-NEXT: ror.w r1, r1, #4
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; CHECK-NEXT: cmp r1, r2
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; CHECK-NEXT: cset r4, lo
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; CHECK-NEXT: .LBB8_4: @ %lor.end
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; CHECK-NEXT: ldr.w r3, [r12, #4]
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; CHECK-NEXT: cmp r3, #1
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; CHECK-NEXT: it lt
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; CHECK-NEXT: poplt {r4, pc}
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; CHECK-NEXT: movw r1, :lower16:days
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; CHECK-NEXT: movt r1, :upper16:days
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; CHECK-NEXT: movs r2, #52
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; CHECK-NEXT: mla r1, r4, r2, r1
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; CHECK-NEXT: movs r2, #0
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; CHECK-NEXT: vdup.32 q0, r2
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; CHECK-NEXT: vmov.32 q1[0], r0
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; CHECK-NEXT: subs r0, r3, #1
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; CHECK-NEXT: dlstp.32 lr, r0
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; CHECK-NEXT: .LBB8_5: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrw.u32 q0, [r1], #16
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; CHECK-NEXT: vadd.i32 q1, q0, q1
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; CHECK-NEXT: letp lr, .LBB8_5
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; CHECK-NEXT: @ %bb.6: @ %middle.block
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; CHECK-NEXT: vmov q0, q1
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; CHECK-NEXT: vaddv.u32 r0, q0
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; CHECK-NEXT: pop {r4, pc}
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entry:
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%day1 = getelementptr inbounds %struct.date, %struct.date* %pd, i32 0, i32 0
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%0 = load i32, i32* %day1, align 4
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%year = getelementptr inbounds %struct.date, %struct.date* %pd, i32 0, i32 2
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%1 = load i32, i32* %year, align 4
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%2 = and i32 %1, 3
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%cmp = icmp ne i32 %2, 0
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%rem3 = srem i32 %1, 100
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%cmp4.not = icmp eq i32 %rem3, 0
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%or.cond = or i1 %cmp, %cmp4.not
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br i1 %or.cond, label %lor.rhs, label %lor.end
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lor.rhs: ; preds = %entry
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%rem6 = srem i32 %1, 400
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%cmp7 = icmp eq i32 %rem6, 0
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%phi.cast = zext i1 %cmp7 to i32
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br label %lor.end
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lor.end: ; preds = %entry, %lor.rhs
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%3 = phi i32 [ %phi.cast, %lor.rhs ], [ 1, %entry ]
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%month = getelementptr inbounds %struct.date, %struct.date* %pd, i32 0, i32 1
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%4 = load i32, i32* %month, align 4
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%cmp820 = icmp sgt i32 %4, 0
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br i1 %cmp820, label %vector.ph, label %for.end
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vector.ph: ; preds = %lor.end
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%n.rnd.up = add i32 %4, 3
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%n.vec = and i32 %n.rnd.up, -4
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%trip.count.minus.1 = add i32 %4, -1
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%5 = insertelement <4 x i32> <i32 undef, i32 0, i32 0, i32 0>, i32 %0, i32 0
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%vec.phi = phi <4 x i32> [ %5, %vector.ph ], [ %8, %vector.body ]
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%6 = getelementptr inbounds [2 x [13 x i32]], [2 x [13 x i32]]* @days, i32 0, i32 %3, i32 %index
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%active.lane.mask = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %trip.count.minus.1)
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%7 = bitcast i32* %6 to <4 x i32>*
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%wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>* nonnull %7, i32 4, <4 x i1> %active.lane.mask, <4 x i32> undef)
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%8 = add <4 x i32> %wide.masked.load, %vec.phi
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%index.next = add i32 %index, 4
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%9 = icmp eq i32 %index.next, %n.vec
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br i1 %9, label %middle.block, label %vector.body
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middle.block: ; preds = %vector.body
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%10 = select <4 x i1> %active.lane.mask, <4 x i32> %8, <4 x i32> %vec.phi
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%11 = call i32 @llvm.experimental.vector.reduce.add.v4i32(<4 x i32> %10)
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br label %for.end
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for.end: ; preds = %middle.block, %lor.end
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%day.0.lcssa = phi i32 [ %0, %lor.end ], [ %11, %middle.block ]
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ret i32 %day.0.lcssa
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}
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declare <4 x i32> @llvm.masked.load.v4i32.p0v4i32(<4 x i32>*, i32 immarg, <4 x i1>, <4 x i32>)
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declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i32(i32, i32)
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declare <16 x i8> @llvm.masked.load.v16i8.p0v16i8(<16 x i8>*, i32 immarg, <16 x i1>, <16 x i8>)
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declare i8 @llvm.experimental.vector.reduce.add.v16i8(<16 x i8>)
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