[SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination

The modified code in visitSTORE was missing a scalable vector check, and still
using the now deprecated implicit cast of TypeSize to uint64_t through the
overloaded operator. This patch fixes these issues.

This brings the logic in line with the comment on the context line immediately
above the added precondition.

Add a test in sve-redundant-store.ll that the warning is not triggered.

Differential Revision: https://reviews.llvm.org/D89701
This commit is contained in:
Peter Waller 2020-10-19 10:07:25 +00:00
parent 6536d6040f
commit 5b742a0c10
2 changed files with 33 additions and 2 deletions

View File

@ -17326,11 +17326,12 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
!ST1->getBasePtr().isUndef() &&
// BaseIndexOffset and the code below requires knowing the size
// of a vector, so bail out if MemoryVT is scalable.
!ST->getMemoryVT().isScalableVector() &&
!ST1->getMemoryVT().isScalableVector()) {
const BaseIndexOffset STBase = BaseIndexOffset::match(ST, DAG);
const BaseIndexOffset ChainBase = BaseIndexOffset::match(ST1, DAG);
unsigned STBitSize = ST->getMemoryVT().getSizeInBits();
unsigned ChainBitSize = ST1->getMemoryVT().getSizeInBits();
unsigned STBitSize = ST->getMemoryVT().getFixedSizeInBits();
unsigned ChainBitSize = ST1->getMemoryVT().getFixedSizeInBits();
// If this is a store who's preceding store to a subset of the current
// location and no one other node is chained to that store we can
// effectively drop the store. Do not remove stores to undef as they may

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@ -0,0 +1,30 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O2 -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
; WARN-NOT: warning: {{.*}}TypeSize is not scalable
; #include <arm_sve.h>
; #include <stdint.h>
;
; void redundant_store(uint32_t *p, svint32_t v) {
; *p = 1;
; *(svint32_t *)p = v;
; }
; Update me: Until dead store elimination is improved in DAGCombine, this will contain a redundant store.
;
define void @redundant_store(i32* nocapture %p, <vscale x 4 x i32> %v) {
; CHECK-LABEL: redundant_store:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1
; CHECK-NEXT: ptrue p0.s
; CHECK-NEXT: str w8, [x0]
; CHECK-NEXT: st1w { z0.s }, p0, [x0]
; CHECK-NEXT: ret
store i32 1, i32* %p, align 4
%1 = bitcast i32* %p to <vscale x 4 x i32>*
store <vscale x 4 x i32> %v, <vscale x 4 x i32>* %1, align 16
ret void
}