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[X86] Add a few more fptosi test cases to demonstrate -x86-experimental-vector-widening legalization not combining vpacksswb+vpmovdw. 

We are able to combine vpackuswb+vpmovdw, but we didn't have packsswb+vpmovdw at the time that combine was added.

llvm-svn: 348909
This commit is contained in:
Craig Topper 2018-12-12 05:55:59 +00:00
parent f237836fd1
commit 5b69b5e20a
2 changed files with 77 additions and 0 deletions
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39
llvm/test/CodeGen/X86/avx512-cvt-widen.ll
View File

@ -625,6 +625,45 @@ define <8 x i32> @f64to8si(<8 x double> %a) {
ret <8 x i32> %b ret <8 x i32> %b
} }
define <8 x i16> @f64to8ss(<8 x double> %f) {
; NOVL-LABEL: f64to8ss:
; NOVL: # %bb.0:
; NOVL-NEXT: vcvttpd2dq %zmm0, %ymm0
; NOVL-NEXT: vpmovdw %zmm0, %ymm0
; NOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; NOVL-NEXT: vzeroupper
; NOVL-NEXT: retq
;
; VL-LABEL: f64to8ss:
; VL: # %bb.0:
; VL-NEXT: vcvttpd2dq %zmm0, %ymm0
; VL-NEXT: vpmovdw %ymm0, %xmm0
; VL-NEXT: vzeroupper
; VL-NEXT: retq
%res = fptosi <8 x double> %f to <8 x i16>
ret <8 x i16> %res
}
define <8 x i8> @f64to8sc(<8 x double> %f) {
; NOVL-LABEL: f64to8sc:
; NOVL: # %bb.0:
; NOVL-NEXT: vcvttpd2dq %zmm0, %ymm0
; NOVL-NEXT: vpmovdw %zmm0, %ymm0
; NOVL-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; NOVL-NEXT: vzeroupper
; NOVL-NEXT: retq
;
; VL-LABEL: f64to8sc:
; VL: # %bb.0:
; VL-NEXT: vcvttpd2dq %zmm0, %ymm0
; VL-NEXT: vpmovdw %ymm0, %xmm0
; VL-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; VL-NEXT: vzeroupper
; VL-NEXT: retq
%res = fptosi <8 x double> %f to <8 x i8>
ret <8 x i8> %res
}
define <4 x i32> @f64to4si(<4 x double> %a) { define <4 x i32> @f64to4si(<4 x double> %a) {
; ALL-LABEL: f64to4si: ; ALL-LABEL: f64to4si:
; ALL: # %bb.0: ; ALL: # %bb.0:

38
llvm/test/CodeGen/X86/avx512-cvt.ll
View File

@ -626,6 +626,44 @@ define <8 x i32> @f64to8si(<8 x double> %a) {
ret <8 x i32> %b ret <8 x i32> %b
} }
define <8 x i16> @f64to8ss(<8 x double> %f) {
; NOVL-LABEL: f64to8ss:
; NOVL: # %bb.0:
; NOVL-NEXT: vcvttpd2dq %zmm0, %ymm0
; NOVL-NEXT: vpmovdw %zmm0, %ymm0
; NOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; NOVL-NEXT: vzeroupper
; NOVL-NEXT: retq
;
; VL-LABEL: f64to8ss:
; VL: # %bb.0:
; VL-NEXT: vcvttpd2dq %zmm0, %ymm0
; VL-NEXT: vpmovdw %ymm0, %xmm0
; VL-NEXT: vzeroupper
; VL-NEXT: retq
%res = fptosi <8 x double> %f to <8 x i16>
ret <8 x i16> %res
}
define <8 x i8> @f64to8sc(<8 x double> %f) {
; NOVL-LABEL: f64to8sc:
; NOVL: # %bb.0:
; NOVL-NEXT: vcvttpd2dq %zmm0, %ymm0
; NOVL-NEXT: vpmovdw %zmm0, %ymm0
; NOVL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
; NOVL-NEXT: vzeroupper
; NOVL-NEXT: retq
;
; VL-LABEL: f64to8sc:
; VL: # %bb.0:
; VL-NEXT: vcvttpd2dq %zmm0, %ymm0
; VL-NEXT: vpmovdw %ymm0, %xmm0
; VL-NEXT: vzeroupper
; VL-NEXT: retq
%res = fptosi <8 x double> %f to <8 x i8>
ret <8 x i8> %res
}
define <4 x i32> @f64to4si(<4 x double> %a) { define <4 x i32> @f64to4si(<4 x double> %a) {
; ALL-LABEL: f64to4si: ; ALL-LABEL: f64to4si:
; ALL: # %bb.0: ; ALL: # %bb.0: