forked from OSchip/llvm-project
[TableGen][AsmMatcherEmitter] Fix tied-constraint checking for InstAliases
Summary: This is a bit of a reimplementation the work done in https://reviews.llvm.org/D41446, since that patch only really works for tied operands of instructions, not aliases. Instead of checking the constraints based on the matched instruction's opcode, this patch uses the match-info's convert function to check the operand constraints for that specific instruction/alias. This is based on the matched operands for the instruction, not the resulting opcode of the MCInst. This patch adds the following enum/table to the *GenAsmMatcher.inc file: enum { Tie0_1_1, Tie0_1_2, Tie0_1_5, ... }; const char TiedAsmOperandTable[][3] = { /* Tie0_1_1 */ { 0, 1, 1 }, /* Tie0_1_2 */ { 0, 1, 2 }, /* Tie0_1_5 */ { 0, 1, 5 }, ... }; And it is referenced directly in the ConversionTable, like this: static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { ... { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Tied, Tie0_1_5, CVT_95_addRegOperands, 6, CVT_Done }, ... The Tie0_1_5 (and corresponding table) encodes that: * Result operand 0 is the operand to copy (which is e.g. done when building up the operands to the MCInst in convertToMCInst()) * Asm operands 1 and 5 should be the same operands (which is checked in checkAsmTiedOperandConstraints()). Reviewers: olista01, rengolin, fhahn, craig.topper, echristo, apazos, dsanders Reviewed By: olista01 Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42293 llvm-svn: 324196
This commit is contained in:
Sander de Smalen
parent
a097bc69df
commit
5b691a10c0
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@ -378,6 +378,9 @@ struct MatchableInfo {
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/// The operand name this is, if anything.
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StringRef SrcOpName;
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/// The operand name this is, before renaming for tied operands.
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StringRef OrigSrcOpName;
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/// The suboperand index within SrcOpName, or -1 for the entire operand.
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int SubOpIdx;
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@ -416,14 +419,22 @@ struct MatchableInfo {
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RegOperand
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} Kind;
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/// Tuple containing the index of the (earlier) result operand that should
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/// be copied from, as well as the indices of the corresponding (parsed)
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/// operands in the asm string.
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struct TiedOperandsTuple {
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unsigned ResOpnd;
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unsigned SrcOpnd1Idx;
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unsigned SrcOpnd2Idx;
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};
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union {
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/// This is the operand # in the AsmOperands list that this should be
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/// copied from.
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unsigned AsmOperandNum;
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/// TiedOperandNum - This is the (earlier) result operand that should be
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/// copied from.
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unsigned TiedOperandNum;
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/// Description of tied operands.
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TiedOperandsTuple TiedOperands;
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/// ImmVal - This is the immediate value added to the instruction.
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int64_t ImmVal;
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@ -444,10 +455,11 @@ struct MatchableInfo {
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return X;
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}
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static ResOperand getTiedOp(unsigned TiedOperandNum) {
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static ResOperand getTiedOp(unsigned TiedOperandNum, unsigned SrcOperand1,
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unsigned SrcOperand2) {
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ResOperand X;
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X.Kind = TiedOperand;
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X.TiedOperandNum = TiedOperandNum;
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X.TiedOperands = { TiedOperandNum, SrcOperand1, SrcOperand2 };
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X.MINumOperands = 1;
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return X;
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}
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@ -574,7 +586,7 @@ struct MatchableInfo {
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/// validate - Return true if this matchable is a valid thing to match against
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/// and perform a bunch of validity checking.
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bool validate(StringRef CommentDelimiter, bool Hack) const;
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bool validate(StringRef CommentDelimiter, bool IsAlias) const;
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/// findAsmOperand - Find the AsmOperand with the specified name and
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/// suboperand index.
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@ -587,14 +599,21 @@ struct MatchableInfo {
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/// findAsmOperandNamed - Find the first AsmOperand with the specified name.
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/// This does not check the suboperand index.
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int findAsmOperandNamed(StringRef N) const {
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auto I = find_if(AsmOperands,
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int findAsmOperandNamed(StringRef N, int LastIdx = -1) const {
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auto I = std::find_if(AsmOperands.begin() + LastIdx + 1, AsmOperands.end(),
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[&](const AsmOperand &Op) { return Op.SrcOpName == N; });
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return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
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}
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int findAsmOperandOriginallyNamed(StringRef N) const {
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auto I =
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find_if(AsmOperands,
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[&](const AsmOperand &Op) { return Op.OrigSrcOpName == N; });
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return (I != AsmOperands.end()) ? I - AsmOperands.begin() : -1;
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}
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void buildInstructionResultOperands();
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void buildAliasResultOperands();
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void buildAliasResultOperands(bool AliasConstraintsAreChecked);
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/// operator< - Compare two matchables.
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bool operator<(const MatchableInfo &RHS) const {
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@ -860,10 +879,6 @@ void MatchableInfo::formTwoOperandAlias(StringRef Constraint) {
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if (Op.AsmOperandNum > (unsigned)SrcAsmOperand)
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--Op.AsmOperandNum;
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break;
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case ResOperand::TiedOperand:
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if (Op.TiedOperandNum > (unsigned)SrcAsmOperand)
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--Op.TiedOperandNum;
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break;
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}
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}
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}
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@ -899,22 +914,6 @@ extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op,
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// be some random non-register token, just ignore it.
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}
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static Optional<size_t>
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getAsmOperandIdx(const SmallVectorImpl<MatchableInfo::AsmOperand> &AsmOperands,
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std::string Name) {
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const auto SymbolicName = std::string("$") + Name;
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const auto Pos =
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std::find_if(AsmOperands.begin(), AsmOperands.end(),
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[&SymbolicName](const MatchableInfo::AsmOperand &A) {
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return A.Token == SymbolicName;
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});
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if (Pos == AsmOperands.end())
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return Optional<size_t>();
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return Optional<size_t>(std::distance(AsmOperands.begin(), Pos));
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}
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void MatchableInfo::initialize(const AsmMatcherInfo &Info,
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SmallPtrSetImpl<Record*> &SingletonRegisters,
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AsmVariantInfo const &Variant,
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@ -963,37 +962,6 @@ void MatchableInfo::initialize(const AsmMatcherInfo &Info,
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HasDeprecation =
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DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false;
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// Do not generate tied operand info if the instruction does not
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// use the default AsmMatchConverter.
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if (TheDef->getValue("AsmMatchConverter") &&
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!TheDef->getValueAsString("AsmMatchConverter").empty())
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return;
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// Generate tied operand contraints info.
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const auto &CGIOperands = getResultInst()->Operands;
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for (const auto &CGIOp : CGIOperands) {
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int TiedReg = CGIOp.getTiedRegister();
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if (TiedReg == -1)
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continue;
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Optional<size_t> LHSIdx = getAsmOperandIdx(AsmOperands, CGIOp.Name);
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Optional<size_t> RHSIdx =
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getAsmOperandIdx(AsmOperands, CGIOperands[TiedReg].Name);
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// Skipping operands with constraint but no reference in the
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// AsmString. No need to throw a warning, as it's normal to have
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// a $dst operand in the outs dag that is constrained to a $src
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// operand in the ins dag but that does not appear in the AsmString.
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if (!LHSIdx || !RHSIdx)
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continue;
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// Add the constraint. Using min/max as we consider constraint
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// pair {A,B} and {B,A} the same
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size_t AddMnemonicIdx = HasMnemonicFirst;
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AsmOperandTiedConstraints.emplace_back(
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std::min(*LHSIdx, *RHSIdx) + AddMnemonicIdx,
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std::max(*LHSIdx, *RHSIdx) + AddMnemonicIdx);
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}
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}
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/// Append an AsmOperand for the given substring of AsmString.
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@ -1086,7 +1054,7 @@ void MatchableInfo::tokenizeAsmString(const AsmMatcherInfo &Info,
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addAsmOperand(String.substr(Prev), IsIsolatedToken);
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}
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bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
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bool MatchableInfo::validate(StringRef CommentDelimiter, bool IsAlias) const {
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// Reject matchables with no .s string.
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if (AsmString.empty())
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PrintFatalError(TheDef->getLoc(), "instruction with empty asm string");
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@ -1119,16 +1087,9 @@ bool MatchableInfo::validate(StringRef CommentDelimiter, bool Hack) const {
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PrintFatalError(TheDef->getLoc(),
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"matchable with operand modifier '" + Tok +
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"' not supported by asm matcher. Mark isCodeGenOnly!");
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// Verify that any operand is only mentioned once.
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// We reject aliases and ignore instructions for now.
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if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
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if (!Hack)
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PrintFatalError(TheDef->getLoc(),
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"ERROR: matchable with tied operand '" + Tok +
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"' can never be matched!");
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// FIXME: Should reject these. The ARM backend hits this with $lane in a
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// bunch of instructions. It is unclear what the right answer is.
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if (!IsAlias && Tok[0] == '$' && !OperandNames.insert(Tok).second) {
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DEBUG({
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errs() << "warning: '" << TheDef->getName() << "': "
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<< "ignoring instruction with tied operand '"
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@ -1520,6 +1481,8 @@ void AsmMatcherInfo::buildInfo() {
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assert(SubtargetFeatures.size() <= 64 && "Too many subtarget features!");
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bool HasMnemonicFirst = AsmParser->getValueAsBit("HasMnemonicFirst");
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bool ReportMultipleNearMisses =
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AsmParser->getValueAsBit("ReportMultipleNearMisses");
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// Parse the instructions; we need to do this first so that we can gather the
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// singleton register classes.
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@ -1562,7 +1525,7 @@ void AsmMatcherInfo::buildInfo() {
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// Ignore instructions which shouldn't be matched and diagnose invalid
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// instruction definitions with an error.
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if (!II->validate(CommentDelimiter, true))
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if (!II->validate(CommentDelimiter, false))
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continue;
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Matchables.push_back(std::move(II));
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@ -1593,7 +1556,7 @@ void AsmMatcherInfo::buildInfo() {
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II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
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// Validate the alias definitions.
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II->validate(CommentDelimiter, false);
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II->validate(CommentDelimiter, true);
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Matchables.push_back(std::move(II));
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}
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@ -1666,7 +1629,12 @@ void AsmMatcherInfo::buildInfo() {
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NewMatchables.push_back(std::move(AliasII));
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}
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} else
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II->buildAliasResultOperands();
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// FIXME: The tied operands checking is not yet integrated with the
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// framework for reporting multiple near misses. To prevent invalid
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// formats from being matched with an alias if a tied-operands check
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// would otherwise have disallowed it, we just disallow such constructs
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// in TableGen completely.
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II->buildAliasResultOperands(!ReportMultipleNearMisses);
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}
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if (!NewMatchables.empty())
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Matchables.insert(Matchables.end(),
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@ -1739,6 +1707,7 @@ buildInstructionOperandReference(MatchableInfo *II,
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// Set up the operand class.
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Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx);
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Op->OrigSrcOpName = OperandName;
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// If the named operand is tied, canonicalize it to the untied operand.
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// For example, something like:
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@ -1783,6 +1752,7 @@ void AsmMatcherInfo::buildAliasOperandReference(MatchableInfo *II,
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Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(),
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Op.SubOpIdx);
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Op.SrcOpName = OperandName;
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Op.OrigSrcOpName = OperandName;
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return;
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}
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@ -1801,11 +1771,16 @@ void MatchableInfo::buildInstructionResultOperands() {
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if (OpInfo.MINumOperands == 1)
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TiedOp = OpInfo.getTiedRegister();
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if (TiedOp != -1) {
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ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
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int TiedSrcOperand = findAsmOperandOriginallyNamed(OpInfo.Name);
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if (TiedSrcOperand != -1 &&
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ResOperands[TiedOp].Kind == ResOperand::RenderAsmOperand)
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ResOperands.push_back(ResOperand::getTiedOp(
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TiedOp, ResOperands[TiedOp].AsmOperandNum, TiedSrcOperand));
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else
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ResOperands.push_back(ResOperand::getTiedOp(TiedOp, 0, 0));
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continue;
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}
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// Find out what operand from the asmparser this MCInst operand comes from.
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int SrcOperand = findAsmOperandNamed(OpInfo.Name);
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if (OpInfo.Name.empty() || SrcOperand == -1) {
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// This may happen for operands that are tied to a suboperand of a
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@ -1834,10 +1809,16 @@ void MatchableInfo::buildInstructionResultOperands() {
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}
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}
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void MatchableInfo::buildAliasResultOperands() {
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void MatchableInfo::buildAliasResultOperands(bool AliasConstraintsAreChecked) {
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const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
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const CodeGenInstruction *ResultInst = getResultInst();
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// Map of: $reg -> #lastref
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// where $reg is the name of the operand in the asm string
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// where #lastref is the last processed index where $reg was referenced in
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// the asm string.
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SmallDenseMap<StringRef, int> OperandRefs;
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// Loop over all operands of the result instruction, determining how to
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// populate them.
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unsigned AliasOpNo = 0;
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@ -1850,7 +1831,31 @@ void MatchableInfo::buildAliasResultOperands() {
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if (OpInfo->MINumOperands == 1)
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TiedOp = OpInfo->getTiedRegister();
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if (TiedOp != -1) {
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ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
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unsigned SrcOp1 = 0;
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unsigned SrcOp2 = 0;
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// If an operand has been specified twice in the asm string,
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// add the two source operand's indices to the TiedOp so that
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// at runtime the 'tied' constraint is checked.
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if (ResOperands[TiedOp].Kind == ResOperand::RenderAsmOperand) {
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SrcOp1 = ResOperands[TiedOp].AsmOperandNum;
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// Find the next operand (similarly named operand) in the string.
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StringRef Name = AsmOperands[SrcOp1].SrcOpName;
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auto Insert = OperandRefs.try_emplace(Name, SrcOp1);
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SrcOp2 = findAsmOperandNamed(Name, Insert.first->second);
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// Not updating the record in OperandRefs will cause TableGen
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// to fail with an error at the end of this function.
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if (AliasConstraintsAreChecked)
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Insert.first->second = SrcOp2;
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// In case it only has one reference in the asm string,
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// it doesn't need to be checked for tied constraints.
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SrcOp2 = (SrcOp2 == (unsigned)-1) ? SrcOp1 : SrcOp2;
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}
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ResOperands.push_back(ResOperand::getTiedOp(TiedOp, SrcOp1, SrcOp2));
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continue;
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}
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@ -1870,6 +1875,11 @@ void MatchableInfo::buildAliasResultOperands() {
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PrintFatalError(TheDef->getLoc(), "Instruction '" +
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TheDef->getName() + "' has operand '" + OpName +
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"' that doesn't appear in asm string!");
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// Add it to the operand references. If it is added a second time, the
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// record won't be updated and it will fail later on.
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OperandRefs.try_emplace(Name, SrcOperand);
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unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
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ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand,
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NumOperands));
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@ -1888,6 +1898,13 @@ void MatchableInfo::buildAliasResultOperands() {
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}
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}
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}
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// Check that operands are not repeated more times than is supported.
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for (auto &T : OperandRefs) {
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if (T.second != -1 && findAsmOperandNamed(T.first, T.second) != -1)
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PrintFatalError(TheDef->getLoc(),
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"Operand '" + T.first + "' can never be matched");
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}
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}
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static unsigned
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@ -1964,9 +1981,14 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
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CvtOS << " static_cast<" << TargetOperandClass
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<< "&>(*Operands[OpIdx]).addRegOperands(Inst, 1);\n";
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CvtOS << " break;\n";
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CvtOS << " case CVT_Tied:\n";
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CvtOS << " Inst.addOperand(Inst.getOperand(OpIdx));\n";
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CvtOS << " case CVT_Tied: {\n";
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CvtOS << " assert(OpIdx < (std::end(TiedAsmOperandTable) -\n";
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CvtOS << " std::begin(TiedAsmOperandTable)) &&\n";
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CvtOS << " \"Tied operand not found\");\n";
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CvtOS << " unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];\n";
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CvtOS << " Inst.addOperand(Inst.getOperand(TiedResOpnd));\n";
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CvtOS << " break;\n";
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CvtOS << " }\n";
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std::string OperandFnBody;
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raw_string_ostream OpOS(OperandFnBody);
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@ -1997,6 +2019,10 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
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OperandConversionKinds.insert(CachedHashString("CVT_Tied"));
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enum { CVT_Done, CVT_Reg, CVT_Tied };
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// Map of e.g. <0, 2, 3> -> "Tie_0_2_3" enum label.
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std::map<std::tuple<unsigned, unsigned, unsigned>, std::string>
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TiedOperandsEnumMap;
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for (auto &II : Infos) {
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// Check if we have a custom match function.
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StringRef AsmMatchConverter =
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@ -2117,11 +2143,21 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
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// If this operand is tied to a previous one, just copy the MCInst
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// operand from the earlier one.We can only tie single MCOperand values.
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assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
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unsigned TiedOp = OpInfo.TiedOperandNum;
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unsigned TiedOp = OpInfo.TiedOperands.ResOpnd;
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unsigned SrcOp1 = OpInfo.TiedOperands.SrcOpnd1Idx + HasMnemonicFirst;
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unsigned SrcOp2 = OpInfo.TiedOperands.SrcOpnd2Idx + HasMnemonicFirst;
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assert(i > TiedOp && "Tied operand precedes its target!");
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Signature += "__Tie" + utostr(TiedOp);
|
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auto TiedTupleName = std::string("Tie") + utostr(TiedOp) + '_' +
|
||||
utostr(SrcOp1) + '_' + utostr(SrcOp2);
|
||||
Signature += "__" + TiedTupleName;
|
||||
ConversionRow.push_back(CVT_Tied);
|
||||
ConversionRow.push_back(TiedOp);
|
||||
ConversionRow.push_back(SrcOp1);
|
||||
ConversionRow.push_back(SrcOp2);
|
||||
|
||||
// Also create an 'enum' for this combination of tied operands.
|
||||
auto Key = std::make_tuple(TiedOp, SrcOp1, SrcOp2);
|
||||
TiedOperandsEnumMap.emplace(Key, TiedTupleName);
|
||||
break;
|
||||
}
|
||||
case MatchableInfo::ResOperand::ImmOperand: {
|
||||
|
|
@ -2206,6 +2242,30 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
|
|||
// Finish up the operand number lookup function.
|
||||
OpOS << " }\n }\n}\n\n";
|
||||
|
||||
// Output a static table for tied operands.
|
||||
if (TiedOperandsEnumMap.size()) {
|
||||
// The number of tied operand combinations will be small in practice,
|
||||
// but just add the assert to be sure.
|
||||
assert(TiedOperandsEnumMap.size() <= 255 &&
|
||||
"Too many tied-operand combinations to reference with "
|
||||
"an 8bit offset from the conversion table");
|
||||
|
||||
OS << "enum {\n";
|
||||
for (auto &KV : TiedOperandsEnumMap) {
|
||||
OS << " " << KV.second << ",\n";
|
||||
}
|
||||
OS << "};\n\n";
|
||||
|
||||
OS << "const char TiedAsmOperandTable[][3] = {\n";
|
||||
for (auto &KV : TiedOperandsEnumMap) {
|
||||
OS << " /* " << KV.second << " */ { " << std::get<0>(KV.first) << ", "
|
||||
<< std::get<1>(KV.first) << ", " << std::get<2>(KV.first) << " },\n";
|
||||
}
|
||||
OS << "};\n\n";
|
||||
} else
|
||||
OS << "const char TiedAsmOperandTable[][3] = { /* empty */ {0, 0, 0} "
|
||||
"};\n\n";
|
||||
|
||||
OS << "namespace {\n";
|
||||
|
||||
// Output the operand conversion kind enum.
|
||||
|
|
@ -2232,9 +2292,26 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
|
|||
assert(ConversionTable[Row].size() % 2 == 0 && "bad conversion row!");
|
||||
OS << " // " << InstructionConversionKinds[Row] << "\n";
|
||||
OS << " { ";
|
||||
for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2)
|
||||
OS << OperandConversionKinds[ConversionTable[Row][i]] << ", "
|
||||
<< (unsigned)(ConversionTable[Row][i + 1]) << ", ";
|
||||
for (unsigned i = 0, e = ConversionTable[Row].size(); i != e; i += 2) {
|
||||
OS << OperandConversionKinds[ConversionTable[Row][i]] << ", ";
|
||||
if (OperandConversionKinds[ConversionTable[Row][i]] !=
|
||||
CachedHashString("CVT_Tied")) {
|
||||
OS << (unsigned)(ConversionTable[Row][i + 1]) << ", ";
|
||||
continue;
|
||||
}
|
||||
|
||||
// For a tied operand, emit a reference to the TiedAsmOperandTable
|
||||
// that contains the operand to copy, and the parsed operands to
|
||||
// check for their tied constraints.
|
||||
auto Key = std::make_tuple((unsigned)ConversionTable[Row][i + 1],
|
||||
(unsigned)ConversionTable[Row][i + 2],
|
||||
(unsigned)ConversionTable[Row][i + 3]);
|
||||
auto TiedOpndEnum = TiedOperandsEnumMap.find(Key);
|
||||
assert(TiedOpndEnum != TiedOperandsEnumMap.end() &&
|
||||
"No record for tied operand pair");
|
||||
OS << TiedOpndEnum->second << ", ";
|
||||
i += 2;
|
||||
}
|
||||
OS << "CVT_Done },\n";
|
||||
}
|
||||
|
||||
|
|
@ -2895,71 +2972,34 @@ static void emitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
|
|||
static void emitAsmTiedOperandConstraints(CodeGenTarget &Target,
|
||||
AsmMatcherInfo &Info,
|
||||
raw_ostream &OS) {
|
||||
std::string Buf;
|
||||
raw_string_ostream TmpOS(Buf);
|
||||
TmpOS << "namespace {\n";
|
||||
TmpOS << " struct TiedAsmOpndPair {\n";
|
||||
TmpOS << " unsigned Opcode;\n";
|
||||
TmpOS << " unsigned Opnd1;\n";
|
||||
TmpOS << " unsigned Opnd2;\n";
|
||||
TmpOS << " TiedAsmOpndPair(unsigned Opcode, unsigned Opnd1, unsigned "
|
||||
"Opnd2)\n";
|
||||
TmpOS << " : Opcode(Opcode), Opnd1(Opnd1), Opnd2(Opnd2) {}\n";
|
||||
TmpOS << " };\n";
|
||||
TmpOS << "} // end anonymous namespace\n\n";
|
||||
TmpOS << "static const TiedAsmOpndPair TiedAsmOperandsTable[] = {\n";
|
||||
bool TableEmpty = true;
|
||||
for (const auto &Inst : Target.getInstructionsByEnumValue()) {
|
||||
auto It = std::find_if(Info.Matchables.begin(), Info.Matchables.end(),
|
||||
[&Inst](const std::unique_ptr<MatchableInfo> &MI) {
|
||||
return (MI->TheDef->getID() == Inst->TheDef->getID());
|
||||
});
|
||||
|
||||
if (It == Info.Matchables.end())
|
||||
continue;
|
||||
|
||||
auto &Constraints = (**It).AsmOperandTiedConstraints;
|
||||
if (Constraints.empty())
|
||||
continue;
|
||||
|
||||
std::string Namespace = Inst->TheDef->getValueAsString("Namespace");
|
||||
|
||||
for (const auto &C : Constraints) {
|
||||
TableEmpty = false;
|
||||
TmpOS << " {";
|
||||
TmpOS << Namespace << "::"<< (**It).TheDef->getName() << ", ";
|
||||
TmpOS << C.first << ", " << C.second;
|
||||
TmpOS << "},\n";
|
||||
}
|
||||
}
|
||||
TmpOS << "};\n\n";
|
||||
if (!TableEmpty)
|
||||
OS << TmpOS.str();
|
||||
|
||||
OS << "static bool ";
|
||||
OS << "checkAsmTiedOperandConstraints(const MCInst &Inst,\n";
|
||||
OS << "checkAsmTiedOperandConstraints(unsigned Kind,\n";
|
||||
OS << " const OperandVector &Operands,\n";
|
||||
OS << " SMLoc &Loc) {\n";
|
||||
|
||||
if (TableEmpty) {
|
||||
OS << "return true;\n}\n\n";
|
||||
return;
|
||||
}
|
||||
|
||||
OS << " const TiedAsmOpndPair SearchValue(Inst.getOpcode(), 0, 0);\n";
|
||||
OS << " const auto Range = std::equal_range(\n";
|
||||
OS << " std::begin(TiedAsmOperandsTable), std::end(TiedAsmOperandsTable),\n";
|
||||
OS << " SearchValue, [](const TiedAsmOpndPair &a,\n";
|
||||
OS << " const TiedAsmOpndPair &b) {\n";
|
||||
OS << " return (a.Opcode < b.Opcode);\n";
|
||||
OS << " });\n\n";
|
||||
OS << " for (auto Item = Range.first; Item != Range.second; ++Item) {\n";
|
||||
OS << " MCParsedAsmOperand &Op1 = *Operands[Item->Opnd1];\n";
|
||||
OS << " MCParsedAsmOperand &Op2 = *Operands[Item->Opnd2];\n";
|
||||
OS << " if ((Op1.isReg() && Op2.isReg()) &&\n";
|
||||
OS << " (Op1.getReg() != Op2.getReg())) {\n";
|
||||
OS << " Loc = Op2.getStartLoc();\n";
|
||||
OS << " return false;\n";
|
||||
OS << " uint64_t &ErrorInfo) {\n";
|
||||
OS << " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n";
|
||||
OS << " const uint8_t *Converter = ConversionTable[Kind];\n";
|
||||
OS << " for (const uint8_t *p = Converter; *p; p+= 2) {\n";
|
||||
OS << " switch (*p) {\n";
|
||||
OS << " case CVT_Tied: {\n";
|
||||
OS << " unsigned OpIdx = *(p+1);\n";
|
||||
OS << " assert(OpIdx < (std::end(TiedAsmOperandTable) -\n";
|
||||
OS << " std::begin(TiedAsmOperandTable)) &&\n";
|
||||
OS << " \"Tied operand not found\");\n";
|
||||
OS << " unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];\n";
|
||||
OS << " unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];\n";
|
||||
OS << " if (OpndNum1 != OpndNum2) {\n";
|
||||
OS << " auto &SrcOp1 = Operands[OpndNum1];\n";
|
||||
OS << " auto &SrcOp2 = Operands[OpndNum2];\n";
|
||||
OS << " if (SrcOp1->isReg() && SrcOp2->isReg() &&\n";
|
||||
OS << " SrcOp1->getReg() != SrcOp2->getReg()) {\n";
|
||||
OS << " ErrorInfo = OpndNum2;\n";
|
||||
OS << " return false;\n";
|
||||
OS << " }\n";
|
||||
OS << " }\n";
|
||||
OS << " break;\n";
|
||||
OS << " }\n";
|
||||
OS << " default:\n";
|
||||
OS << " break;\n";
|
||||
OS << " }\n";
|
||||
OS << " }\n";
|
||||
OS << " return true;\n";
|
||||
|
|
@ -3640,11 +3680,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
|||
OS << " if (matchingInlineAsm) {\n";
|
||||
OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";
|
||||
if (!ReportMultipleNearMisses) {
|
||||
OS << " SMLoc Loc;\n";
|
||||
OS << " if (!checkAsmTiedOperandConstraints(Inst, Operands, Loc)) {\n";
|
||||
OS << " ErrorInfo = " << (HasMnemonicFirst ? "1" : "SIndex") << ";\n";
|
||||
OS << " if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))\n";
|
||||
OS << " return Match_InvalidTiedOperand;\n";
|
||||
OS << " }\n";
|
||||
OS << "\n";
|
||||
}
|
||||
OS << " return Match_Success;\n";
|
||||
|
|
@ -3722,11 +3759,8 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
|
|||
}
|
||||
|
||||
if (!ReportMultipleNearMisses) {
|
||||
OS << " SMLoc Loc;\n";
|
||||
OS << " if (!checkAsmTiedOperandConstraints(Inst, Operands, Loc)) {\n";
|
||||
OS << " ErrorInfo = " << (HasMnemonicFirst ? "1" : "SIndex") << ";\n";
|
||||
OS << " if (!checkAsmTiedOperandConstraints(it->ConvertFn, Operands, ErrorInfo))\n";
|
||||
OS << " return Match_InvalidTiedOperand;\n";
|
||||
OS << " }\n";
|
||||
OS << "\n";
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue