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[AMDGPU] fix MADAK/MADMK instructions operand namings to match encoding fields. 

$vsrc1 -> $src1, $k -> $imm

Differential Revision: http://reviews.llvm.org/D18659

llvm-svn: 265141
This commit is contained in:
Valery Pykhtin 2016-04-01 13:13:12 +00:00
parent f0537825a2
commit 5b3559c1ec
3 changed files with 16 additions and 16 deletions
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8
llvm/lib/Target/AMDGPU/SIInstrFormats.td
View File

@ -369,15 +369,15 @@ class VOP2_MADKe <bits<6> op> : Enc64 {
bits<8> vdst;
bits<9> src0;
bits<8> vsrc1;
bits<32> src2;
bits<8> src1;
bits<32> imm;
let Inst{8-0} = src0;
let Inst{16-9} = vsrc1;
let Inst{16-9} = src1;
let Inst{24-17} = vdst;
let Inst{30-25} = op;
let Inst{31} = 0x0; // encoding
let Inst{63-32} = src2;
let Inst{63-32} = imm;
}
class VOP3a <bits<9> op> : Enc64 {

8
llvm/lib/Target/AMDGPU/SIInstrInfo.td
View File

@ -1576,12 +1576,12 @@ def VOP_CNDMASK : VOPProfile <[i32, i32, i32, untyped]> {
def VOP_F32_F32_F32_F32 : VOPProfile <[f32, f32, f32, f32]>;
def VOP_MADAK : VOPProfile <[f32, f32, f32, f32]> {
field dag Ins32 = (ins VCSrc_32:$src0, VGPR_32:$vsrc1, u32imm:$k);
field string Asm32 = "$vdst, $src0, $vsrc1, $k";
field dag Ins32 = (ins VCSrc_32:$src0, VGPR_32:$src1, u32imm:$imm);
field string Asm32 = "$vdst, $src0, $src1, $imm";
}
def VOP_MADMK : VOPProfile <[f32, f32, f32, f32]> {
field dag Ins32 = (ins VCSrc_32:$src0, u32imm:$k, VGPR_32:$vsrc1);
field string Asm32 = "$vdst, $src0, $k, $vsrc1";
field dag Ins32 = (ins VCSrc_32:$src0, u32imm:$imm, VGPR_32:$src1);
field string Asm32 = "$vdst, $src0, $imm, $src1";
}
def VOP_MAC : VOPProfile <[f32, f32, f32, f32]> {
let Ins32 = (ins Src0RC32:$src0, Src1RC32:$src1, VGPR_32:$src2);

16
llvm/test/MC/Disassembler/AMDGPU/vop2_vi.txt
View File

@ -75,11 +75,11 @@
# VI: v_mac_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2c]
0x02 0x07 0x02 0x2c
# FIXME: v_madmk_f32_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x2e,0x00,0x00,0x80,0x42]
#0x02 0x07 0x02 0x2e 0x00 0x00 0x80 0x42
# VI: v_madmk_f32_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x2e,0x00,0x00,0x80,0x42]
0x02 0x07 0x02 0x2e 0x00 0x00 0x80 0x42
# FIXME: v_madak_f32_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x30,0x00,0x00,0x80,0x42]
#0x02 0x07 0x02 0x30 0x00 0x00 0x80 0x42
# VI: v_madak_f32_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x30,0x00,0x00,0x80,0x42]
0x02 0x07 0x02 0x30 0x00 0x00 0x80 0x42
# VI: v_bcnt_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8b,0xd2,0x02,0x07,0x02,0x00]
0x01 0x00 0x8b 0xd2 0x02 0x07 0x02 0x00
@ -204,11 +204,11 @@
# VI: v_mac_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x46]
0x02 0x07 0x02 0x46
# FIXME: v_madmk_f16_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x48,0x00,0x00,0x80,0x42]
#0x02 0x07 0x02 0x48 0x00 0x00 0x80 0x42
# VI: v_madmk_f16_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x48,0x00,0x00,0x80,0x42]
0x02 0x07 0x02 0x48 0x00 0x00 0x80 0x42
# FIXME: v_madak_f16_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x4a,0x00,0x00,0x80,0x42]
#0x02 0x07 0x02 0x4a 0x00 0x00 0x80 0x42
# VI: v_madak_f16_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x4a,0x00,0x00,0x80,0x42]
0x02 0x07 0x02 0x4a 0x00 0x00 0x80 0x42
# VI: v_add_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x4c]
0x02 0x07 0x02 0x4c