maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[MachineOutliner] Do not outline debug instructions 

The debug location is removed from any outlined instruction. This
causes the MachineVerifier to crash on outlined DBG_VALUE
instructions.

Then, debug instructions are "invisible" to the outliner, that is, two
ranges of instructions from different functions are considered
identical if the only difference is debug instructions. Since a debug
instruction from one function is unlikely to provide sensible debug
information about all functions, sharing an outlined sequence, this
patch just removes debug instructions from the outlined functions.

Differential Revision: https://reviews.llvm.org/D89485
This commit is contained in:
Momchil Velikov 2020-11-05 19:11:43 +00:00
parent f7bc568266
commit 5b30d9adc0
2 changed files with 55 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/lib/CodeGen/MachineOutliner.cpp
View File

@ -654,6 +654,8 @@ MachineFunction *MachineOutliner::createOutlinedFunction(
OriginalMF->getFrameInstructions();
for (auto I = FirstCand.front(), E = std::next(FirstCand.back()); I != E;
++I) {
if (I->isDebugInstr())
continue;
MachineInstr *NewMI = MF.CloneMachineInstr(&*I);
if (I->isCFIInstruction()) {
unsigned CFIIndex = NewMI->getOperand(0).getCFIIndex();

53
llvm/test/CodeGen/ARM/machine-outliner-remove-debug-instr.mir Normal file
View File

@ -0,0 +1,53 @@
# RUN: llc -verify-machineinstrs -run-pass=machine-outliner -mtriple=thumbv7m-none-eabi %s -o - | FileCheck %s
# Check the outlined function does not contain debug instructions
# CHECK-LABEL: name: f
# CHECK: tBL {{.*}} @OUTLINED_FUNCTION_0,
# CHECK-LABEL: name: g
# CHECK: tBL {{.*}} @OUTLINED_FUNCTION_0,
# CHECK-LABEL: name: OUTLINED_FUNCTION_0
# CHECK-NOT: DBG_VALUE
# CHECK: tTAILJMPdND @h
--- |
define void @f() { entry: ret void }
define void @g() { entry: ret void }
declare void @h()
...
---
name: f
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $r0, $r1, $r2, $r3, $r4, $lr
frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
$r4 = tMOVr $r1, 14, $noreg
DBG_VALUE $r4, $noreg
renamable $r0, dead $cpsr = nsw tMUL renamable $r1, killed renamable $r0, 14, $noreg
renamable $r0, dead $cpsr = nsw tSUBrr killed renamable $r0, renamable $r1, 14, $noreg
tBL 14, $noreg, @h, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0
frame-destroy tPOP_RET 14, $noreg, def $r4, def $pc, implicit killed $r0
...
---
name: g
tracksRegLiveness: true
body: |
bb.0.entry:
liveins: $r0, $r1, $r2, $r3, $r4, $lr
frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
$r4 = tMOVr $r1, 14, $noreg
DBG_VALUE $r4, $noreg
renamable $r0, dead $cpsr = nsw tMUL renamable $r1, killed renamable $r0, 14, $noreg
renamable $r0, dead $cpsr = nsw tSUBrr killed renamable $r0, renamable $r1, 14, $noreg
tBL 14, $noreg, @h, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit-def $sp, implicit-def $r0
frame-destroy tPOP_RET 14, $noreg, def $r4, def $pc, implicit killed $r0
...