diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 5baec745c941..549f4539dec6 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -428,20 +428,7 @@ bool PPCDAGToDAGISel::SelectAddr(SDOperand Addr, SDOperand &Op1,
     }
   }
 
-  // Now check if we're dealing with a global, and whether or not we should emit
-  // an optimized load or store for statics.
-  if (GlobalAddressSDNode *GN = dyn_cast<GlobalAddressSDNode>(Addr)) {
-    GlobalValue *GV = GN->getGlobal();
-    if (!GV->hasWeakLinkage() && !GV->isExternal()) {
-      Op1 = CurDAG->getTargetGlobalAddress(GV, MVT::i32);
-      if (PICEnabled)
-        Op2 = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(),
-                                    Op1);
-      else
-        Op2 = CurDAG->getTargetNode(PPC::LIS, MVT::i32, Op1);
-      return false;
-    }
-  } else if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Addr)) {
+ if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Addr)) {
     Op1 = getI32Imm(0);
     Op2 = CurDAG->getTargetFrameIndex(FI->getIndex(), MVT::i32);
     return false;
@@ -907,22 +894,6 @@ SDOperand PPCDAGToDAGISel::Select(SDOperand Op) {
     }
     return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, CPI);
   }
-#if 1
-  case ISD::GlobalAddress: {
-    GlobalValue *GV = cast<GlobalAddressSDNode>(N)->getGlobal();
-    SDOperand Tmp;
-    SDOperand GA = CurDAG->getTargetGlobalAddress(GV, MVT::i32);
-    if (PICEnabled)
-      Tmp = CurDAG->getTargetNode(PPC::ADDIS, MVT::i32, getGlobalBaseReg(), GA);
-    else
-      Tmp = CurDAG->getTargetNode(PPC::LIS, MVT::i32, GA);
-
-    if (GV->hasWeakLinkage() || GV->isExternal())
-      return CurDAG->getTargetNode(PPC::LWZ, MVT::i32, GA, Tmp);
-    else
-      return CurDAG->getTargetNode(PPC::LA, MVT::i32, Tmp, GA);
-  }
-#endif
   case ISD::FADD: {
     MVT::ValueType Ty = N->getValueType(0);
     if (!NoExcessFPPrecision) {  // Match FMA ops
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 3b7a706f52c1..216372987f36 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -93,7 +93,7 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
   
   // We want to legalize GlobalAddress into the appropriate instructions to
   // materialize the address.
-  //setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
+  setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
   
   if (TM.getSubtarget<PPCSubtarget>().is64Bit()) {
     // They also have instructions for converting between i64 and fp.
diff --git a/llvm/lib/Target/PowerPC/README.txt b/llvm/lib/Target/PowerPC/README.txt
index 88582966994a..580affb688dd 100644
--- a/llvm/lib/Target/PowerPC/README.txt
+++ b/llvm/lib/Target/PowerPC/README.txt
@@ -31,24 +31,6 @@ as one load when using --enable-pic.
 * Support 'update' load/store instructions.  These are cracked on the G5, but
   are still a codesize win.
 
-* Add a custom legalizer for the GlobalAddress node, to move the funky darwin
-  stub stuff from the instruction selector to the legalizer (exposing low-level
-  operations to the dag for optzn.  For example, we want to codegen this:
-
-        int A = 0;
-        void B() { A++; }
-  as:
-        lis r9,ha16(_A)
-        lwz r2,lo16(_A)(r9)
-        addi r2,r2,1
-        stw r2,lo16(_A)(r9)
-  not:
-        lis r2, ha16(_A)
-        lwz r2, lo16(_A)(r2)
-        addi r2, r2, 1
-        lis r3, ha16(_A)
-        stw r2, lo16(_A)(r3)
-
 * should hint to the branch select pass that it doesn't need to print the
   second unconditional branch, so we don't end up with things like:
 	b .LBBl42__2E_expand_function_8_674	; loopentry.24