forked from OSchip/llvm-project
Allow vectorization of intrinsics such as powi,cttz and ctlz in Loop and SLP Vectorizer.
This patch adds support to vectorize intrinsics such as powi, cttz and ctlz in Vectorizer. These intrinsics are different from other intrinsics as second argument to these function must be same in order to vectorize them and it should be represented as a scalar. Review: http://reviews.llvm.org/D3851#inline-32769 and http://reviews.llvm.org/D3937#inline-32857 llvm-svn: 209873
This commit is contained in:
Karthik Bhat
parent
6cd3ebb223
commit
5ab7795649
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@ -48,12 +48,27 @@ static inline bool isTriviallyVectorizable(Intrinsic::ID ID) {
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case Intrinsic::pow:
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case Intrinsic::fma:
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case Intrinsic::fmuladd:
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case Intrinsic::ctlz:
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case Intrinsic::cttz:
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case Intrinsic::powi:
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return true;
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default:
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return false;
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}
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}
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static bool hasVectorInstrinsicScalarOpd(Intrinsic::ID ID,
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unsigned ScalarOpdIdx) {
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switch (ID) {
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case Intrinsic::ctlz:
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case Intrinsic::cttz:
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case Intrinsic::powi:
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return (ScalarOpdIdx == 1);
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default:
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return false;
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}
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}
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static Intrinsic::ID checkUnaryFloatSignature(const CallInst &I,
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Intrinsic::ID ValidIntrinsicID) {
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if (I.getNumArgOperands() != 1 ||
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@ -3123,9 +3123,14 @@ void InnerLoopVectorizer::vectorizeBlockInLoop(BasicBlock *BB, PhiVector *PV) {
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scalarizeInstruction(it);
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break;
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default:
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bool HasScalarOpd = hasVectorInstrinsicScalarOpd(ID, 1);
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for (unsigned Part = 0; Part < UF; ++Part) {
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SmallVector<Value *, 4> Args;
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for (unsigned i = 0, ie = CI->getNumArgOperands(); i != ie; ++i) {
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if (HasScalarOpd && i == 1) {
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Args.push_back(CI->getArgOperand(i));
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continue;
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}
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VectorParts &Arg = getVectorValue(CI->getArgOperand(i));
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Args.push_back(Arg[Part]);
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}
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@ -3474,6 +3479,16 @@ bool LoopVectorizationLegality::canVectorizeInstrs() {
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return false;
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}
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// Intrinsics such as powi,cttz and ctlz are legal to vectorize if the
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// second argument is the same (i.e. loop invariant)
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if (CI &&
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hasVectorInstrinsicScalarOpd(getIntrinsicIDForCall(CI, TLI), 1)) {
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if (!SE->isLoopInvariant(SE->getSCEV(CI->getOperand(1)), TheLoop)) {
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DEBUG(dbgs() << "LV: Found unvectorizable intrinsic " << *CI << "\n");
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return false;
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}
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}
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// Check that the instruction return type is vectorizable.
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// Also, we can't vectorize extractelement instructions.
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if ((!VectorType::isValidElementType(it->getType()) &&
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@ -961,9 +961,10 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth) {
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DEBUG(dbgs() << "SLP: Non-vectorizable call.\n");
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return;
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}
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Function *Int = CI->getCalledFunction();
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Value *A1I = nullptr;
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if (hasVectorInstrinsicScalarOpd(ID, 1))
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A1I = CI->getArgOperand(1);
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for (unsigned i = 1, e = VL.size(); i != e; ++i) {
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CallInst *CI2 = dyn_cast<CallInst>(VL[i]);
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if (!CI2 || CI2->getCalledFunction() != Int ||
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@ -973,6 +974,18 @@ void BoUpSLP::buildTree_rec(ArrayRef<Value *> VL, unsigned Depth) {
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<< "\n");
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return;
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}
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// ctlz,cttz and powi are special intrinsics whose second argument
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// should be same in order for them to be vectorized.
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if (hasVectorInstrinsicScalarOpd(ID, 1)) {
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Value *A1J = CI2->getArgOperand(1);
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if (A1I != A1J) {
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newTreeEntry(VL, false);
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DEBUG(dbgs() << "SLP: mismatched arguments in call:" << *CI
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<< " argument "<< A1I<<"!=" << A1J
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<< "\n");
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return;
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}
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}
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}
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newTreeEntry(VL, true);
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@ -1652,9 +1665,21 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E) {
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case Instruction::Call: {
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CallInst *CI = cast<CallInst>(VL0);
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setInsertPointAfterBundle(E->Scalars);
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Function *FI;
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Intrinsic::ID IID = Intrinsic::not_intrinsic;
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if (CI && (FI = CI->getCalledFunction())) {
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IID = (Intrinsic::ID) FI->getIntrinsicID();
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}
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std::vector<Value *> OpVecs;
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for (int j = 0, e = CI->getNumArgOperands(); j < e; ++j) {
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ValueList OpVL;
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// ctlz,cttz and powi are special intrinsics whose second argument is
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// a scalar. This argument should not be vectorized.
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if (hasVectorInstrinsicScalarOpd(IID, 1) && j == 1) {
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CallInst *CEI = cast<CallInst>(E->Scalars[0]);
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OpVecs.push_back(CEI->getArgOperand(j));
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continue;
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}
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for (int i = 0, e = E->Scalars.size(); i < e; ++i) {
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CallInst *CEI = cast<CallInst>(E->Scalars[i]);
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OpVL.push_back(CEI->getArgOperand(j));
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@ -1090,3 +1090,105 @@ for.end: ; preds = %for.body
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ret void
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}
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declare double @llvm.powi.f64(double %Val, i32 %power) nounwind readnone
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;CHECK-LABEL: @powi_f64(
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;CHECK: llvm.powi.v4f64
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;CHECK: ret void
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define void @powi_f64(i32 %n, double* noalias %y, double* noalias %x, i32 %P) nounwind uwtable {
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv
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%0 = load double* %arrayidx, align 8
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%call = tail call double @llvm.powi.f64(double %0, i32 %P) nounwind readnone
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%arrayidx4 = getelementptr inbounds double* %x, i64 %indvars.iv
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store double %call, double* %arrayidx4, align 8
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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;CHECK-LABEL: @powi_f64_neg(
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;CHECK-NOT: llvm.powi.v4f64
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;CHECK: ret void
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define void @powi_f64_neg(i32 %n, double* noalias %y, double* noalias %x) nounwind uwtable {
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv
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%0 = load double* %arrayidx, align 8
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%1 = trunc i64 %indvars.iv to i32
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%call = tail call double @llvm.powi.f64(double %0, i32 %1) nounwind readnone
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%arrayidx4 = getelementptr inbounds double* %x, i64 %indvars.iv
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store double %call, double* %arrayidx4, align 8
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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declare i64 @llvm.cttz.i64 (i64, i1) nounwind readnone
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;CHECK-LABEL: @cttz_f64(
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;CHECK: llvm.cttz.v4i64
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;CHECK: ret void
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define void @cttz_f64(i32 %n, i64* noalias %y, i64* noalias %x) nounwind uwtable {
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i64* %y, i64 %indvars.iv
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%0 = load i64* %arrayidx, align 8
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%call = tail call i64 @llvm.cttz.i64(i64 %0, i1 true) nounwind readnone
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%arrayidx4 = getelementptr inbounds i64* %x, i64 %indvars.iv
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store i64 %call, i64* %arrayidx4, align 8
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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declare i64 @llvm.ctlz.i64 (i64, i1) nounwind readnone
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;CHECK-LABEL: @ctlz_f64(
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;CHECK: llvm.ctlz.v4i64
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;CHECK: ret void
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define void @ctlz_f64(i32 %n, i64* noalias %y, i64* noalias %x) nounwind uwtable {
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i64* %y, i64 %indvars.iv
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%0 = load i64* %arrayidx, align 8
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%call = tail call i64 @llvm.ctlz.i64(i64 %0, i1 true) nounwind readnone
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%arrayidx4 = getelementptr inbounds i64* %x, i64 %indvars.iv
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store i64 %call, i64* %arrayidx4, align 8
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%indvars.iv.next = add i64 %indvars.iv, 1
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32
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%exitcond = icmp eq i32 %lftr.wideiv, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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@ -117,3 +117,270 @@ entry:
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; CHECK: store <4 x i32>
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; CHECK: ret
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}
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declare i32 @llvm.ctlz.i32(i32,i1) nounwind readnone
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define void @vec_ctlz_i32(i32* %a, i32* %b, i32* %c, i1) {
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entry:
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%i0 = load i32* %a, align 4
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%i1 = load i32* %b, align 4
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%add1 = add i32 %i0, %i1
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%call1 = tail call i32 @llvm.ctlz.i32(i32 %add1,i1 true) nounwind readnone
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%arrayidx2 = getelementptr inbounds i32* %a, i32 1
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%i2 = load i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32* %b, i32 1
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%i3 = load i32* %arrayidx3, align 4
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%add2 = add i32 %i2, %i3
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%call2 = tail call i32 @llvm.ctlz.i32(i32 %add2,i1 true) nounwind readnone
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%arrayidx4 = getelementptr inbounds i32* %a, i32 2
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%i4 = load i32* %arrayidx4, align 4
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%arrayidx5 = getelementptr inbounds i32* %b, i32 2
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%i5 = load i32* %arrayidx5, align 4
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%add3 = add i32 %i4, %i5
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%call3 = tail call i32 @llvm.ctlz.i32(i32 %add3,i1 true) nounwind readnone
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%arrayidx6 = getelementptr inbounds i32* %a, i32 3
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%i6 = load i32* %arrayidx6, align 4
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%arrayidx7 = getelementptr inbounds i32* %b, i32 3
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%i7 = load i32* %arrayidx7, align 4
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%add4 = add i32 %i6, %i7
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%call4 = tail call i32 @llvm.ctlz.i32(i32 %add4,i1 true) nounwind readnone
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store i32 %call1, i32* %c, align 4
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%arrayidx8 = getelementptr inbounds i32* %c, i32 1
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store i32 %call2, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32* %c, i32 2
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store i32 %call3, i32* %arrayidx9, align 4
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%arrayidx10 = getelementptr inbounds i32* %c, i32 3
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store i32 %call4, i32* %arrayidx10, align 4
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ret void
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; CHECK-LABEL: @vec_ctlz_i32(
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; CHECK: load <4 x i32>
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; CHECK: load <4 x i32>
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; CHECK: call <4 x i32> @llvm.ctlz.v4i32
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; CHECK: store <4 x i32>
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; CHECK: ret
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}
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define void @vec_ctlz_i32_neg(i32* %a, i32* %b, i32* %c, i1) {
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entry:
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%i0 = load i32* %a, align 4
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%i1 = load i32* %b, align 4
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%add1 = add i32 %i0, %i1
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%call1 = tail call i32 @llvm.ctlz.i32(i32 %add1,i1 true) nounwind readnone
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%arrayidx2 = getelementptr inbounds i32* %a, i32 1
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%i2 = load i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32* %b, i32 1
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%i3 = load i32* %arrayidx3, align 4
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%add2 = add i32 %i2, %i3
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%call2 = tail call i32 @llvm.ctlz.i32(i32 %add2,i1 false) nounwind readnone
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%arrayidx4 = getelementptr inbounds i32* %a, i32 2
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%i4 = load i32* %arrayidx4, align 4
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%arrayidx5 = getelementptr inbounds i32* %b, i32 2
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%i5 = load i32* %arrayidx5, align 4
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%add3 = add i32 %i4, %i5
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%call3 = tail call i32 @llvm.ctlz.i32(i32 %add3,i1 true) nounwind readnone
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%arrayidx6 = getelementptr inbounds i32* %a, i32 3
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%i6 = load i32* %arrayidx6, align 4
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%arrayidx7 = getelementptr inbounds i32* %b, i32 3
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%i7 = load i32* %arrayidx7, align 4
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%add4 = add i32 %i6, %i7
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%call4 = tail call i32 @llvm.ctlz.i32(i32 %add4,i1 false) nounwind readnone
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store i32 %call1, i32* %c, align 4
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%arrayidx8 = getelementptr inbounds i32* %c, i32 1
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store i32 %call2, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32* %c, i32 2
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store i32 %call3, i32* %arrayidx9, align 4
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%arrayidx10 = getelementptr inbounds i32* %c, i32 3
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store i32 %call4, i32* %arrayidx10, align 4
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ret void
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; CHECK-LABEL: @vec_ctlz_i32_neg(
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; CHECK-NOT: call <4 x i32> @llvm.ctlz.v4i32
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}
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declare i32 @llvm.cttz.i32(i32,i1) nounwind readnone
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define void @vec_cttz_i32(i32* %a, i32* %b, i32* %c, i1) {
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entry:
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%i0 = load i32* %a, align 4
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%i1 = load i32* %b, align 4
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%add1 = add i32 %i0, %i1
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%call1 = tail call i32 @llvm.cttz.i32(i32 %add1,i1 true) nounwind readnone
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%arrayidx2 = getelementptr inbounds i32* %a, i32 1
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%i2 = load i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32* %b, i32 1
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%i3 = load i32* %arrayidx3, align 4
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%add2 = add i32 %i2, %i3
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%call2 = tail call i32 @llvm.cttz.i32(i32 %add2,i1 true) nounwind readnone
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%arrayidx4 = getelementptr inbounds i32* %a, i32 2
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%i4 = load i32* %arrayidx4, align 4
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%arrayidx5 = getelementptr inbounds i32* %b, i32 2
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%i5 = load i32* %arrayidx5, align 4
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%add3 = add i32 %i4, %i5
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%call3 = tail call i32 @llvm.cttz.i32(i32 %add3,i1 true) nounwind readnone
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%arrayidx6 = getelementptr inbounds i32* %a, i32 3
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%i6 = load i32* %arrayidx6, align 4
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%arrayidx7 = getelementptr inbounds i32* %b, i32 3
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%i7 = load i32* %arrayidx7, align 4
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%add4 = add i32 %i6, %i7
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%call4 = tail call i32 @llvm.cttz.i32(i32 %add4,i1 true) nounwind readnone
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store i32 %call1, i32* %c, align 4
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%arrayidx8 = getelementptr inbounds i32* %c, i32 1
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store i32 %call2, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32* %c, i32 2
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store i32 %call3, i32* %arrayidx9, align 4
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%arrayidx10 = getelementptr inbounds i32* %c, i32 3
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store i32 %call4, i32* %arrayidx10, align 4
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ret void
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; CHECK-LABEL: @vec_cttz_i32(
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; CHECK: load <4 x i32>
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; CHECK: load <4 x i32>
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; CHECK: call <4 x i32> @llvm.cttz.v4i32
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; CHECK: store <4 x i32>
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; CHECK: ret
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}
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define void @vec_cttz_i32_neg(i32* %a, i32* %b, i32* %c, i1) {
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entry:
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%i0 = load i32* %a, align 4
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%i1 = load i32* %b, align 4
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%add1 = add i32 %i0, %i1
|
||||
%call1 = tail call i32 @llvm.cttz.i32(i32 %add1,i1 true) nounwind readnone
|
||||
|
||||
%arrayidx2 = getelementptr inbounds i32* %a, i32 1
|
||||
%i2 = load i32* %arrayidx2, align 4
|
||||
%arrayidx3 = getelementptr inbounds i32* %b, i32 1
|
||||
%i3 = load i32* %arrayidx3, align 4
|
||||
%add2 = add i32 %i2, %i3
|
||||
%call2 = tail call i32 @llvm.cttz.i32(i32 %add2,i1 false) nounwind readnone
|
||||
|
||||
%arrayidx4 = getelementptr inbounds i32* %a, i32 2
|
||||
%i4 = load i32* %arrayidx4, align 4
|
||||
%arrayidx5 = getelementptr inbounds i32* %b, i32 2
|
||||
%i5 = load i32* %arrayidx5, align 4
|
||||
%add3 = add i32 %i4, %i5
|
||||
%call3 = tail call i32 @llvm.cttz.i32(i32 %add3,i1 true) nounwind readnone
|
||||
|
||||
%arrayidx6 = getelementptr inbounds i32* %a, i32 3
|
||||
%i6 = load i32* %arrayidx6, align 4
|
||||
%arrayidx7 = getelementptr inbounds i32* %b, i32 3
|
||||
%i7 = load i32* %arrayidx7, align 4
|
||||
%add4 = add i32 %i6, %i7
|
||||
%call4 = tail call i32 @llvm.cttz.i32(i32 %add4,i1 false) nounwind readnone
|
||||
|
||||
store i32 %call1, i32* %c, align 4
|
||||
%arrayidx8 = getelementptr inbounds i32* %c, i32 1
|
||||
store i32 %call2, i32* %arrayidx8, align 4
|
||||
%arrayidx9 = getelementptr inbounds i32* %c, i32 2
|
||||
store i32 %call3, i32* %arrayidx9, align 4
|
||||
%arrayidx10 = getelementptr inbounds i32* %c, i32 3
|
||||
store i32 %call4, i32* %arrayidx10, align 4
|
||||
ret void
|
||||
|
||||
; CHECK-LABEL: @vec_cttz_i32_neg(
|
||||
; CHECK-NOT: call <4 x i32> @llvm.cttz.v4i32
|
||||
}
|
||||
|
||||
|
||||
declare float @llvm.powi.f32(float, i32)
|
||||
define void @vec_powi_f32(float* %a, float* %b, float* %c, i32 %P) {
|
||||
entry:
|
||||
%i0 = load float* %a, align 4
|
||||
%i1 = load float* %b, align 4
|
||||
%add1 = fadd float %i0, %i1
|
||||
%call1 = tail call float @llvm.powi.f32(float %add1,i32 %P) nounwind readnone
|
||||
|
||||
%arrayidx2 = getelementptr inbounds float* %a, i32 1
|
||||
%i2 = load float* %arrayidx2, align 4
|
||||
%arrayidx3 = getelementptr inbounds float* %b, i32 1
|
||||
%i3 = load float* %arrayidx3, align 4
|
||||
%add2 = fadd float %i2, %i3
|
||||
%call2 = tail call float @llvm.powi.f32(float %add2,i32 %P) nounwind readnone
|
||||
|
||||
%arrayidx4 = getelementptr inbounds float* %a, i32 2
|
||||
%i4 = load float* %arrayidx4, align 4
|
||||
%arrayidx5 = getelementptr inbounds float* %b, i32 2
|
||||
%i5 = load float* %arrayidx5, align 4
|
||||
%add3 = fadd float %i4, %i5
|
||||
%call3 = tail call float @llvm.powi.f32(float %add3,i32 %P) nounwind readnone
|
||||
|
||||
%arrayidx6 = getelementptr inbounds float* %a, i32 3
|
||||
%i6 = load float* %arrayidx6, align 4
|
||||
%arrayidx7 = getelementptr inbounds float* %b, i32 3
|
||||
%i7 = load float* %arrayidx7, align 4
|
||||
%add4 = fadd float %i6, %i7
|
||||
%call4 = tail call float @llvm.powi.f32(float %add4,i32 %P) nounwind readnone
|
||||
|
||||
store float %call1, float* %c, align 4
|
||||
%arrayidx8 = getelementptr inbounds float* %c, i32 1
|
||||
store float %call2, float* %arrayidx8, align 4
|
||||
%arrayidx9 = getelementptr inbounds float* %c, i32 2
|
||||
store float %call3, float* %arrayidx9, align 4
|
||||
%arrayidx10 = getelementptr inbounds float* %c, i32 3
|
||||
store float %call4, float* %arrayidx10, align 4
|
||||
ret void
|
||||
|
||||
; CHECK-LABEL: @vec_powi_f32(
|
||||
; CHECK: load <4 x float>
|
||||
; CHECK: load <4 x float>
|
||||
; CHECK: call <4 x float> @llvm.powi.v4f32
|
||||
; CHECK: store <4 x float>
|
||||
; CHECK: ret
|
||||
}
|
||||
|
||||
|
||||
define void @vec_powi_f32_neg(float* %a, float* %b, float* %c, i32 %P, i32 %Q) {
|
||||
entry:
|
||||
%i0 = load float* %a, align 4
|
||||
%i1 = load float* %b, align 4
|
||||
%add1 = fadd float %i0, %i1
|
||||
%call1 = tail call float @llvm.powi.f32(float %add1,i32 %P) nounwind readnone
|
||||
|
||||
%arrayidx2 = getelementptr inbounds float* %a, i32 1
|
||||
%i2 = load float* %arrayidx2, align 4
|
||||
%arrayidx3 = getelementptr inbounds float* %b, i32 1
|
||||
%i3 = load float* %arrayidx3, align 4
|
||||
%add2 = fadd float %i2, %i3
|
||||
%call2 = tail call float @llvm.powi.f32(float %add2,i32 %Q) nounwind readnone
|
||||
|
||||
%arrayidx4 = getelementptr inbounds float* %a, i32 2
|
||||
%i4 = load float* %arrayidx4, align 4
|
||||
%arrayidx5 = getelementptr inbounds float* %b, i32 2
|
||||
%i5 = load float* %arrayidx5, align 4
|
||||
%add3 = fadd float %i4, %i5
|
||||
%call3 = tail call float @llvm.powi.f32(float %add3,i32 %P) nounwind readnone
|
||||
|
||||
%arrayidx6 = getelementptr inbounds float* %a, i32 3
|
||||
%i6 = load float* %arrayidx6, align 4
|
||||
%arrayidx7 = getelementptr inbounds float* %b, i32 3
|
||||
%i7 = load float* %arrayidx7, align 4
|
||||
%add4 = fadd float %i6, %i7
|
||||
%call4 = tail call float @llvm.powi.f32(float %add4,i32 %Q) nounwind readnone
|
||||
|
||||
store float %call1, float* %c, align 4
|
||||
%arrayidx8 = getelementptr inbounds float* %c, i32 1
|
||||
store float %call2, float* %arrayidx8, align 4
|
||||
%arrayidx9 = getelementptr inbounds float* %c, i32 2
|
||||
store float %call3, float* %arrayidx9, align 4
|
||||
%arrayidx10 = getelementptr inbounds float* %c, i32 3
|
||||
store float %call4, float* %arrayidx10, align 4
|
||||
ret void
|
||||
|
||||
; CHECK-LABEL: @vec_powi_f32_neg(
|
||||
; CHECK-NOT: call <4 x float> @llvm.powi.v4f32
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue