forked from OSchip/llvm-project
[x86] auto-generate complete checks; NFC
llvm-svn: 349162
This commit is contained in:
Sanjay Patel
parent
41e8112ed6
commit
5a97a105f8
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@ -1,13 +1,13 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7-avx | FileCheck %s
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; RUN: opt -instsimplify -disable-output < %s
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;CHECK-LABEL: AGEP0:
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define <4 x i32*> @AGEP0(i32* %ptr) nounwind {
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entry:
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;CHECK-LABEL: AGEP0
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;CHECK: vbroadcast
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;CHECK-NEXT: vpaddd
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;CHECK-NEXT: ret
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; CHECK-LABEL: AGEP0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: vpaddd {{\.LCPI.*}}, %xmm0, %xmm0
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; CHECK-NEXT: retl
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%vecinit.i = insertelement <4 x i32*> undef, i32* %ptr, i32 0
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%vecinit2.i = insertelement <4 x i32*> %vecinit.i, i32* %ptr, i32 1
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%vecinit4.i = insertelement <4 x i32*> %vecinit2.i, i32* %ptr, i32 2
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@ -17,109 +17,185 @@ entry:
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ret <4 x i32*> %A3
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}
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;CHECK-LABEL: AGEP1:
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define i32 @AGEP1(<4 x i32*> %param) nounwind {
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entry:
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;CHECK-LABEL: AGEP1
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;CHECK: vpaddd
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;CHECK-NEXT: vpextrd
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;CHECK-NEXT: movl
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; CHECK-LABEL: AGEP1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd {{\.LCPI.*}}, %xmm0, %xmm0
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; CHECK-NEXT: vpextrd $3, %xmm0, %eax
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; CHECK-NEXT: movl (%eax), %eax
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; CHECK-NEXT: retl
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
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%k = extractelement <4 x i32*> %A2, i32 3
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%v = load i32, i32* %k
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ret i32 %v
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP2:
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define i32 @AGEP2(<4 x i32*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP2
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;CHECK: vpslld $2
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;CHECK-NEXT: vpadd
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; CHECK-LABEL: AGEP2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpslld $2, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: vpextrd $3, %xmm0, %eax
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; CHECK-NEXT: movl (%eax), %eax
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; CHECK-NEXT: retl
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> %off
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%k = extractelement <4 x i32*> %A2, i32 3
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%v = load i32, i32* %k
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ret i32 %v
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP3:
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define <4 x i32*> @AGEP3(<4 x i32*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP3
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;CHECK: vpslld $2
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;CHECK-NEXT: vpadd
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; CHECK-LABEL: AGEP3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: vpslld $2, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: movl %esp, %eax
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; CHECK-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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%A2 = getelementptr i32, <4 x i32*> %param, <4 x i32> %off
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%v = alloca i32
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%k = insertelement <4 x i32*> %A2, i32* %v, i32 3
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ret <4 x i32*> %k
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP4:
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define <4 x i16*> @AGEP4(<4 x i16*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP4
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; Multiply offset by two (add it to itself).
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;CHECK: vpadd
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; add the base to the offset
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;CHECK-NEXT: vpadd
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; CHECK-LABEL: AGEP4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retl
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%A = getelementptr i16, <4 x i16*> %param, <4 x i32> %off
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ret <4 x i16*> %A
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP5:
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define <4 x i8*> @AGEP5(<4 x i8*> %param, <4 x i8> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP5
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;CHECK: vpaddd
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; CHECK-LABEL: AGEP5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpslld $24, %xmm1, %xmm1
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; CHECK-NEXT: vpsrad $24, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retl
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%A = getelementptr i8, <4 x i8*> %param, <4 x i8> %off
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ret <4 x i8*> %A
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;CHECK: ret
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}
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; The size of each element is 1 byte. No need to multiply by element size.
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;CHECK-LABEL: AGEP6:
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define <4 x i8*> @AGEP6(<4 x i8*> %param, <4 x i32> %off) nounwind {
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entry:
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;CHECK-LABEL: AGEP6
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;CHECK-NOT: pslld
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; CHECK-LABEL: AGEP6:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retl
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%A = getelementptr i8, <4 x i8*> %param, <4 x i32> %off
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ret <4 x i8*> %A
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP7:
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define <4 x i8*> @AGEP7(<4 x i8*> %param, i32 %off) nounwind {
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entry:
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;CHECK: vbroadcastss
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;CHECK: vpadd
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; CHECK-LABEL: AGEP7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retl
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%A = getelementptr i8, <4 x i8*> %param, i32 %off
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ret <4 x i8*> %A
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP8:
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define <4 x i16*> @AGEP8(i16* %param, <4 x i32> %off) nounwind {
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entry:
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; Multiply offset by two (add it to itself).
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;CHECK: vpadd
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; add the base to the offset
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;CHECK: vbroadcastss
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;CHECK-NEXT: vpadd
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; CHECK-LABEL: AGEP8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vbroadcastss {{[0-9]+}}(%esp), %xmm1
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; CHECK-NEXT: vpaddd %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: retl
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%A = getelementptr i16, i16* %param, <4 x i32> %off
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ret <4 x i16*> %A
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;CHECK: ret
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}
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;CHECK-LABEL: AGEP9:
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define <64 x i16*> @AGEP9(i16* %param, <64 x i32> %off) nounwind {
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entry:
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;CHECK: vbroadcastss
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; CHECK-LABEL: AGEP9:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: andl $-32, %esp
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; CHECK-NEXT: subl $96, %esp
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; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm3
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; CHECK-NEXT: vpaddd %xmm3, %xmm3, %xmm4
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; CHECK-NEXT: vbroadcastss 12(%ebp), %xmm3
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; CHECK-NEXT: vpaddd %xmm4, %xmm3, %xmm4
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; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vpaddd %xmm0, %xmm3, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%e{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vextractf128 $1, %ymm1, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm4, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm3, %xmm4
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; CHECK-NEXT: vpaddd %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm3, %xmm1
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; CHECK-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm0
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; CHECK-NEXT: vmovaps %ymm0, (%esp) # 32-byte Spill
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; CHECK-NEXT: vextractf128 $1, %ymm2, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm4, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm3, %xmm4
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; CHECK-NEXT: vpaddd %xmm2, %xmm2, %xmm2
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; CHECK-NEXT: vpaddd %xmm2, %xmm3, %xmm2
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; CHECK-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2
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; CHECK-NEXT: vmovdqa 40(%ebp), %xmm4
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; CHECK-NEXT: vmovdqa 56(%ebp), %xmm5
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; CHECK-NEXT: vpaddd %xmm5, %xmm5, %xmm5
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; CHECK-NEXT: vpaddd %xmm5, %xmm3, %xmm5
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; CHECK-NEXT: vpaddd %xmm4, %xmm4, %xmm4
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; CHECK-NEXT: vpaddd %xmm4, %xmm3, %xmm4
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; CHECK-NEXT: vinsertf128 $1, %xmm5, %ymm4, %ymm4
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; CHECK-NEXT: vmovdqa 72(%ebp), %xmm5
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; CHECK-NEXT: vmovdqa 88(%ebp), %xmm6
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; CHECK-NEXT: vpaddd %xmm6, %xmm6, %xmm6
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; CHECK-NEXT: vpaddd %xmm6, %xmm3, %xmm6
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; CHECK-NEXT: vpaddd %xmm5, %xmm5, %xmm5
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; CHECK-NEXT: vpaddd %xmm5, %xmm3, %xmm5
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; CHECK-NEXT: vinsertf128 $1, %xmm6, %ymm5, %ymm5
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; CHECK-NEXT: vmovdqa 104(%ebp), %xmm6
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; CHECK-NEXT: vmovdqa 120(%ebp), %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm7, %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm3, %xmm7
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; CHECK-NEXT: vpaddd %xmm6, %xmm6, %xmm6
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; CHECK-NEXT: vpaddd %xmm6, %xmm3, %xmm6
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; CHECK-NEXT: vinsertf128 $1, %xmm7, %ymm6, %ymm6
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; CHECK-NEXT: vmovdqa 152(%ebp), %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm7, %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm3, %xmm7
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; CHECK-NEXT: vmovdqa 136(%ebp), %xmm0
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; CHECK-NEXT: vpaddd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vpaddd %xmm0, %xmm3, %xmm0
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; CHECK-NEXT: vinsertf128 $1, %xmm7, %ymm0, %ymm0
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; CHECK-NEXT: vmovdqa 184(%ebp), %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm7, %xmm7
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; CHECK-NEXT: vpaddd %xmm7, %xmm3, %xmm7
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; CHECK-NEXT: vmovdqa 168(%ebp), %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpaddd %xmm1, %xmm3, %xmm1
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; CHECK-NEXT: vinsertf128 $1, %xmm7, %ymm1, %ymm1
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; CHECK-NEXT: movl 8(%ebp), %eax
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; CHECK-NEXT: vmovaps %ymm1, 224(%eax)
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; CHECK-NEXT: vmovaps %ymm0, 192(%eax)
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; CHECK-NEXT: vmovaps %ymm6, 160(%eax)
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; CHECK-NEXT: vmovaps %ymm5, 128(%eax)
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; CHECK-NEXT: vmovaps %ymm4, 96(%eax)
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; CHECK-NEXT: vmovaps %ymm2, 64(%eax)
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; CHECK-NEXT: vmovaps (%esp), %ymm0 # 32-byte Reload
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; CHECK-NEXT: vmovaps %ymm0, 32(%eax)
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; CHECK-NEXT: vmovaps {{[-0-9]+}}(%e{{[sb]}}p), %ymm0 # 32-byte Reload
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; CHECK-NEXT: vmovaps %ymm0, (%eax)
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; CHECK-NEXT: movl %ebp, %esp
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retl $4
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%A = getelementptr i16, i16* %param, <64 x i32> %off
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ret <64 x i16*> %A
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;CHECK: ret
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}
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