forked from OSchip/llvm-project
InstCombine: Preserve nuw when reassociating nuw ops [1/3]
Alive says this is OK. llvm-svn: 364233
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@ -223,6 +223,11 @@ static bool MaintainNoSignedWrap(BinaryOperator &I, Value *B, Value *C) {
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return !Overflow;
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}
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static bool hasNoUnsignedWrap(BinaryOperator &I) {
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OverflowingBinaryOperator *OBO = dyn_cast<OverflowingBinaryOperator>(&I);
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return OBO && OBO->hasNoUnsignedWrap();
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}
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/// Conservatively clears subclassOptionalData after a reassociation or
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/// commutation. We preserve fast-math flags when applicable as they can be
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/// preserved.
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@ -329,14 +334,19 @@ bool InstCombiner::SimplifyAssociativeOrCommutative(BinaryOperator &I) {
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I.setOperand(1, V);
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// Conservatively clear the optional flags, since they may not be
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// preserved by the reassociation.
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if (MaintainNoSignedWrap(I, B, C) &&
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bool IsNUW = hasNoUnsignedWrap(I) && hasNoUnsignedWrap(*Op0);
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bool IsNSW = MaintainNoSignedWrap(I, B, C);
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ClearSubclassDataAfterReassociation(I);
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if (IsNUW)
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I.setHasNoUnsignedWrap(true);
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if (IsNSW &&
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(!Op0 || (isa<BinaryOperator>(Op0) && Op0->hasNoSignedWrap()))) {
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// Note: this is only valid because SimplifyBinOp doesn't look at
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// the operands to Op0.
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I.clearSubclassOptionalData();
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I.setHasNoSignedWrap(true);
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} else {
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ClearSubclassDataAfterReassociation(I);
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}
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Changed = true;
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@ -3,7 +3,7 @@
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define i32 @reassoc_add_nuw(i32 %x) {
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; CHECK-LABEL: @reassoc_add_nuw(
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; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[X:%.*]], 68
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; CHECK-NEXT: [[ADD1:%.*]] = add nuw i32 [[X:%.*]], 68
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; CHECK-NEXT: ret i32 [[ADD1]]
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;
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%add0 = add nuw i32 %x, 4
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@ -172,7 +172,7 @@ define void @test3(i64 %trip, i64 %add) {
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; PROLOG: loop_exiting_bb1.7:
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; PROLOG-NEXT: switch i64 %sum.next.6, label %loop_latch.7
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; PROLOG: loop_latch.7:
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; PROLOG-NEXT: %iv_next.7 = add nsw i64 %iv, 8
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; PROLOG-NEXT: %iv_next.7 = add nuw nsw i64 %iv, 8
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; PROLOG-NEXT: %sum.next.7 = add i64 %sum.next.6, %add
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; PROLOG-NEXT: %cmp.7 = icmp eq i64 %iv_next.7, %trip
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; PROLOG-NEXT: br i1 %cmp.7, label %exit2.loopexit.unr-lcssa, label %loop_header
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@ -426,7 +426,7 @@ define i64 @test5(i64 %trip, i64 %add, i1 %cond) {
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; PROLOG-NEXT: %result = phi i64 [ %result.ph, %exit1.loopexit ], [ %ivy.prol, %exit1.loopexit1 ]
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; PROLOG-NEXT: ret i64 %result
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; PROLOG: loop_latch.7:
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; PROLOG: %iv_next.7 = add nsw i64 %iv, 8
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; PROLOG: %iv_next.7 = add nuw nsw i64 %iv, 8
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entry:
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br label %loop_header
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@ -578,7 +578,7 @@ define void @test8() {
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; PROLOG: %lcmp.mod = icmp eq i64
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; PROLOG-NEXT: br i1 %lcmp.mod, label %innerH.prol.loopexit, label %innerH.prol.preheader
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; PROLOG: latch.6:
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; PROLOG-NEXT: %tmp4.7 = add nsw i64 %tmp3, 8
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; PROLOG-NEXT: %tmp4.7 = add nuw nsw i64 %tmp3, 8
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; PROLOG-NEXT: br i1 false, label %outerloop.loopexit.loopexit, label %latch.7
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; PROLOG: latch.7
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; PROLOG-NEXT: %tmp6.7 = icmp ult i64 %tmp4.7, 100
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