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Add shuffle splat pattern for x86 sse shifts. 

llvm-svn: 63193
This commit is contained in:
Mon P Wang 2009-01-28 08:12:05 +00:00
parent 882214b676
commit 5a685a52c1
1 changed files with 24 additions and 20 deletions
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44
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -7678,28 +7678,32 @@ static SDValue PerformShiftCombine(SDNode* N, SelectionDAG &DAG,
if (VT != MVT::v2i64 && VT != MVT::v4i32 && VT != MVT::v8i16)
return SDValue();
SDValue ShAmtOp = N->getOperand(1);
if (ShAmtOp.getOpcode() != ISD::BUILD_VECTOR)
SDValue ShAmtOp = N->getOperand(1);
MVT EltVT = VT.getVectorElementType();
SDValue BaseShAmt;
if (ShAmtOp.getOpcode() == ISD::BUILD_VECTOR) {
unsigned NumElts = VT.getVectorNumElements();
unsigned i = 0;
for (; i != NumElts; ++i) {
SDValue Arg = ShAmtOp.getOperand(i);
if (Arg.getOpcode() == ISD::UNDEF) continue;
BaseShAmt = Arg;
break;
}
for (; i != NumElts; ++i) {
SDValue Arg = ShAmtOp.getOperand(i);
if (Arg.getOpcode() == ISD::UNDEF) continue;
if (Arg != BaseShAmt) {
return SDValue();
}
}
} else if (ShAmtOp.getOpcode() == ISD::VECTOR_SHUFFLE &&
isSplatMask(ShAmtOp.getOperand(2).getNode())) {
BaseShAmt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, EltVT, ShAmtOp,
DAG.getIntPtrConstant(0));
} else
return SDValue();
unsigned NumElts = VT.getVectorNumElements();
unsigned i = 0;
SDValue BaseShAmt;
for (; i != NumElts; ++i) {
SDValue Arg = ShAmtOp.getOperand(i);
if (Arg.getOpcode() == ISD::UNDEF) continue;
BaseShAmt = Arg;
break;
}
for (; i != NumElts; ++i) {
SDValue Arg = ShAmtOp.getOperand(i);
if (Arg.getOpcode() == ISD::UNDEF) continue;
if (Arg != BaseShAmt) {
return SDValue();
}
}
MVT EltVT = VT.getVectorElementType();
if (EltVT.bitsGT(MVT::i32))
BaseShAmt = DAG.getNode(ISD::TRUNCATE, MVT::i32, BaseShAmt);
else if (EltVT.bitsLT(MVT::i32))