forked from OSchip/llvm-project
[X86][SSE2] Added fast-isel tests to sync with clang/test/CodeGen/sse2-builtins.c
llvm-svn: 269966
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse2-builtins.c
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define i64 @test_mm_cvtsd_si64(<2 x double> %a0) nounwind {
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; X64-LABEL: test_mm_cvtsd_si64:
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; X64: # BB#0:
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; X64-NEXT: cvtsd2si %xmm0, %rax
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; X64-NEXT: retq
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%res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0)
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ret i64 %res
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}
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declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
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define i64 @test_mm_cvtsi128_si64(<2 x i64> %a0) nounwind {
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; X64-LABEL: test_mm_cvtsi128_si64:
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; X64: # BB#0:
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; X64-NEXT: movd %xmm0, %rax
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; X64-NEXT: retq
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%res = extractelement <2 x i64> %a0, i32 0
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ret i64 %res
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}
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define <2 x double> @test_mm_cvtsi64_sd(<2 x double> %a0, i64 %a1) nounwind {
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; X64-LABEL: test_mm_cvtsi64_sd:
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; X64: # BB#0:
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; X64-NEXT: cvtsi2sdq %rdi, %xmm1
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; X64-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
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; X64-NEXT: retq
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%cvt = sitofp i64 %a1 to double
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%res = insertelement <2 x double> %a0, double %cvt, i32 0
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ret <2 x double> %res
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}
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define <2 x i64> @test_mm_cvtsi64_si128(i64 %a0) nounwind {
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; X64-LABEL: test_mm_cvtsi64_si128:
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; X64: # BB#0:
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; X64-NEXT: movd %rdi, %xmm0
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; X64-NEXT: retq
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%res0 = insertelement <2 x i64> undef, i64 %a0, i32 0
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%res1 = insertelement <2 x i64> %res0, i64 0, i32 1
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ret <2 x i64> %res1
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}
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define i64 @test_mm_cvttsd_si64(<2 x double> %a0) nounwind {
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; X64-LABEL: test_mm_cvttsd_si64:
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; X64: # BB#0:
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; X64-NEXT: cvttsd2si %xmm0, %rax
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; X64-NEXT: retq
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%ext = extractelement <2 x double> %a0, i32 0
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%res = fptosi double %ext to i64
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ret i64 %res
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}
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define void @test_mm_stream_si64(i64 *%a0, i64 %a1) {
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; X64-LABEL: test_mm_stream_si64:
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; X64: # BB#0:
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; X64-NEXT: movntiq %rsi, (%rdi)
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; X64-NEXT: retq
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store i64 %a1, i64* %a0, align 1, !nontemporal !0
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ret void
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}
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!0 = !{i64 1}
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