maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[ARM] add ARMv8.6-A Activity monitors virtualization extension 

Summary:
This patch upstreams v8.6A activity monitors virtualization
assembler support, which consists of 32 new system
registers (two groups, each with 16 numbered registers).

See ARMv8.6-AMU in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, john.brawn, ostannard

Reviewed By: ostannard

Subscribers: LukeGeeson, dnsampaio, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76998
This commit is contained in:
Diogo Sampaio 2020-04-05 12:39:59 +01:00 committed by Ties Stuij
parent ff889df356
commit 59d10dc703
5 changed files with 546 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
llvm/lib/Target/AArch64/AArch64.td
View File

@ -281,6 +281,11 @@ def FeatureAM : SubtargetFeature<
"am", "HasAM", "true",
"Enable v8.4-A Activity Monitors extension">;
def FeatureAMVS : SubtargetFeature<
"amvs", "HasAMVS", "true",
"Enable v8.6-A Activity Monitors Virtualization support",
[FeatureAM]>;
def FeatureSEL2 : SubtargetFeature<
"sel2", "HasSEL2", "true",
"Enable v8.4-A Secure Exception Level 2 extension">;
@ -398,7 +403,7 @@ def HasV8_5aOps : SubtargetFeature<
def HasV8_6aOps : SubtargetFeature<
"v8.6a", "HasV8_6aOps", "true", "Support ARM v8.6a instructions",
[HasV8_5aOps, FeatureBF16]>;
[HasV8_5aOps, FeatureAMVS, FeatureBF16]>;
//===----------------------------------------------------------------------===//
// Register File Description

2
llvm/lib/Target/AArch64/AArch64Subtarget.h
View File

@ -147,6 +147,7 @@ protected:
// Armv8.6-A Extensions
bool HasBF16 = false;
bool HasAMVS = false;
// Arm SVE2 extensions
bool HasSVE2AES = false;
@ -451,6 +452,7 @@ public:
bool hasDIT() const { return HasDIT; }
bool hasTRACEV8_4() const { return HasTRACEV8_4; }
bool hasAM() const { return HasAM; }
bool hasAMVS() const { return HasAMVS; }
bool hasSEL2() const { return HasSEL2; }
bool hasPMU() const { return HasPMU; }
bool hasTLB_RMI() const { return HasTLB_RMI; }

14
llvm/lib/Target/AArch64/AArch64SystemOperands.td
View File

@ -1488,6 +1488,20 @@ def : RWSysReg<"TRBTRG_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b110>;
def : ROSysReg<"TRBIDR_EL1", 0b11, 0b000, 0b1001, 0b1011, 0b111>;
} // FeatureTRBE
// v8.6a Activity Monitors Virtualization Support
let Requires = [{ {AArch64::FeatureAMVS} }] in {
foreach n = 0-15 in {
foreach x = 0-1 in {
def : RWSysReg<"AMEVCNTVOFF"#x#n#"_EL2",
0b11, 0b100, 0b1101, 0b1000, 0b000>{
let Encoding{4} = x;
let Encoding{3-0} = n;
}
}
}
}
// Cyclone specific system registers
// Op0 Op1 CRn CRm Op2
let Requires = [{ {AArch64::ProcAppleA7} }] in

327
llvm/test/MC/AArch64/armv8.6a-amvs.s Normal file
View File

@ -0,0 +1,327 @@
// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+amvs -o - %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8.6a -o - %s | FileCheck %s
// RUN: not llvm-mc -triple aarch64 -show-encoding -o - %p/armv8.6a-amvs.s 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
msr AMEVCNTVOFF00_EL2, x0
msr AMEVCNTVOFF01_EL2, x0
msr AMEVCNTVOFF02_EL2, x0
msr AMEVCNTVOFF03_EL2, x0
msr AMEVCNTVOFF04_EL2, x0
msr AMEVCNTVOFF05_EL2, x0
msr AMEVCNTVOFF06_EL2, x0
msr AMEVCNTVOFF07_EL2, x0
msr AMEVCNTVOFF08_EL2, x0
msr AMEVCNTVOFF09_EL2, x0
msr AMEVCNTVOFF010_EL2, x0
msr AMEVCNTVOFF011_EL2, x0
msr AMEVCNTVOFF012_EL2, x0
msr AMEVCNTVOFF013_EL2, x0
msr AMEVCNTVOFF014_EL2, x0
msr AMEVCNTVOFF015_EL2, x0
mrs x0, AMEVCNTVOFF00_EL2
mrs x0, AMEVCNTVOFF01_EL2
mrs x0, AMEVCNTVOFF02_EL2
mrs x0, AMEVCNTVOFF03_EL2
mrs x0, AMEVCNTVOFF04_EL2
mrs x0, AMEVCNTVOFF05_EL2
mrs x0, AMEVCNTVOFF06_EL2
mrs x0, AMEVCNTVOFF07_EL2
mrs x0, AMEVCNTVOFF08_EL2
mrs x0, AMEVCNTVOFF09_EL2
mrs x0, AMEVCNTVOFF010_EL2
mrs x0, AMEVCNTVOFF011_EL2
mrs x0, AMEVCNTVOFF012_EL2
mrs x0, AMEVCNTVOFF013_EL2
mrs x0, AMEVCNTVOFF014_EL2
mrs x0, AMEVCNTVOFF015_EL2
msr AMEVCNTVOFF10_EL2, x0
msr AMEVCNTVOFF11_EL2, x0
msr AMEVCNTVOFF12_EL2, x0
msr AMEVCNTVOFF13_EL2, x0
msr AMEVCNTVOFF14_EL2, x0
msr AMEVCNTVOFF15_EL2, x0
msr AMEVCNTVOFF16_EL2, x0
msr AMEVCNTVOFF17_EL2, x0
msr AMEVCNTVOFF18_EL2, x0
msr AMEVCNTVOFF19_EL2, x0
msr AMEVCNTVOFF110_EL2, x0
msr AMEVCNTVOFF111_EL2, x0
msr AMEVCNTVOFF112_EL2, x0
msr AMEVCNTVOFF113_EL2, x0
msr AMEVCNTVOFF114_EL2, x0
msr AMEVCNTVOFF115_EL2, x0
mrs x0, AMEVCNTVOFF10_EL2
mrs x0, AMEVCNTVOFF11_EL2
mrs x0, AMEVCNTVOFF12_EL2
mrs x0, AMEVCNTVOFF13_EL2
mrs x0, AMEVCNTVOFF14_EL2
mrs x0, AMEVCNTVOFF15_EL2
mrs x0, AMEVCNTVOFF16_EL2
mrs x0, AMEVCNTVOFF17_EL2
mrs x0, AMEVCNTVOFF18_EL2
mrs x0, AMEVCNTVOFF19_EL2
mrs x0, AMEVCNTVOFF110_EL2
mrs x0, AMEVCNTVOFF111_EL2
mrs x0, AMEVCNTVOFF112_EL2
mrs x0, AMEVCNTVOFF113_EL2
mrs x0, AMEVCNTVOFF114_EL2
mrs x0, AMEVCNTVOFF115_EL2
// CHECK: .text
// CHECK-NEXT: msr AMEVCNTVOFF00_EL2, x0 // encoding: [0x00,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF01_EL2, x0 // encoding: [0x20,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF02_EL2, x0 // encoding: [0x40,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF03_EL2, x0 // encoding: [0x60,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF04_EL2, x0 // encoding: [0x80,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF05_EL2, x0 // encoding: [0xa0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF06_EL2, x0 // encoding: [0xc0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF07_EL2, x0 // encoding: [0xe0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF08_EL2, x0 // encoding: [0x00,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF09_EL2, x0 // encoding: [0x20,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF010_EL2, x0 // encoding: [0x40,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF011_EL2, x0 // encoding: [0x60,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF012_EL2, x0 // encoding: [0x80,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF013_EL2, x0 // encoding: [0xa0,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF014_EL2, x0 // encoding: [0xc0,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF015_EL2, x0 // encoding: [0xe0,0xd9,0x1c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF00_EL2 // encoding: [0x00,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF01_EL2 // encoding: [0x20,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF02_EL2 // encoding: [0x40,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF03_EL2 // encoding: [0x60,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF04_EL2 // encoding: [0x80,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF05_EL2 // encoding: [0xa0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF06_EL2 // encoding: [0xc0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF07_EL2 // encoding: [0xe0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF08_EL2 // encoding: [0x00,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF09_EL2 // encoding: [0x20,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF010_EL2 // encoding: [0x40,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF011_EL2 // encoding: [0x60,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF012_EL2 // encoding: [0x80,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF013_EL2 // encoding: [0xa0,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF014_EL2 // encoding: [0xc0,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF015_EL2 // encoding: [0xe0,0xd9,0x3c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF10_EL2, x0 // encoding: [0x00,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF11_EL2, x0 // encoding: [0x20,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF12_EL2, x0 // encoding: [0x40,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF13_EL2, x0 // encoding: [0x60,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF14_EL2, x0 // encoding: [0x80,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF15_EL2, x0 // encoding: [0xa0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF16_EL2, x0 // encoding: [0xc0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF17_EL2, x0 // encoding: [0xe0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF18_EL2, x0 // encoding: [0x00,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF19_EL2, x0 // encoding: [0x20,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF110_EL2, x0 // encoding: [0x40,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF111_EL2, x0 // encoding: [0x60,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF112_EL2, x0 // encoding: [0x80,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF113_EL2, x0 // encoding: [0xa0,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF114_EL2, x0 // encoding: [0xc0,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF115_EL2, x0 // encoding: [0xe0,0xdb,0x1c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF10_EL2 // encoding: [0x00,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF11_EL2 // encoding: [0x20,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF12_EL2 // encoding: [0x40,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF13_EL2 // encoding: [0x60,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF14_EL2 // encoding: [0x80,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF15_EL2 // encoding: [0xa0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF16_EL2 // encoding: [0xc0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF17_EL2 // encoding: [0xe0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF18_EL2 // encoding: [0x00,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF19_EL2 // encoding: [0x20,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF110_EL2 // encoding: [0x40,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF111_EL2 // encoding: [0x60,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF112_EL2 // encoding: [0x80,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF113_EL2 // encoding: [0xa0,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF114_EL2 // encoding: [0xc0,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF115_EL2 // encoding: [0xe0,0xdb,0x3c,0xd5]
// CHECK-ERROR: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF00_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF01_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF02_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF03_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF04_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF05_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF06_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF07_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF08_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF09_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF010_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF011_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF012_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF013_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF014_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF015_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF00_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF01_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF02_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF03_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF04_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF05_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF06_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF07_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF08_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF09_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF010_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF011_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF012_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF013_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF014_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF015_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF10_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF11_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF12_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF13_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF14_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF15_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF16_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF17_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF18_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF19_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF110_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF111_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF112_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF113_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF114_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected writable system register or pstate
// CHECK-ERROR-NEXT: msr AMEVCNTVOFF115_EL2, x0
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF10_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF11_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF12_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF13_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF14_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF15_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF16_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF17_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF18_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF19_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF110_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF111_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF112_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF113_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF114_EL2
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: expected readable system register
// CHECK-ERROR-NEXT: mrs x0, AMEVCNTVOFF115_EL2
// CHECK-ERROR-NEXT: ^

197
llvm/test/MC/Disassembler/AArch64/armv8.6a-amvs.s Normal file
View File

@ -0,0 +1,197 @@
// RUN: llvm-mc -triple aarch64 -show-encoding -disassemble -mattr=+amvs %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -disassemble -mattr=+v8.6a -o - %s | FileCheck %s
// RUN: llvm-mc -triple aarch64 -show-encoding -disassemble -o - %s | FileCheck --check-prefix=NOAMVS %s
[0x00,0xd8,0x1c,0xd5]
[0x20,0xd8,0x1c,0xd5]
[0x40,0xd8,0x1c,0xd5]
[0x60,0xd8,0x1c,0xd5]
[0x80,0xd8,0x1c,0xd5]
[0xa0,0xd8,0x1c,0xd5]
[0xc0,0xd8,0x1c,0xd5]
[0xe0,0xd8,0x1c,0xd5]
[0x00,0xd9,0x1c,0xd5]
[0x20,0xd9,0x1c,0xd5]
[0x40,0xd9,0x1c,0xd5]
[0x60,0xd9,0x1c,0xd5]
[0x80,0xd9,0x1c,0xd5]
[0xa0,0xd9,0x1c,0xd5]
[0xc0,0xd9,0x1c,0xd5]
[0xe0,0xd9,0x1c,0xd5]
[0x00,0xd8,0x3c,0xd5]
[0x20,0xd8,0x3c,0xd5]
[0x40,0xd8,0x3c,0xd5]
[0x60,0xd8,0x3c,0xd5]
[0x80,0xd8,0x3c,0xd5]
[0xa0,0xd8,0x3c,0xd5]
[0xc0,0xd8,0x3c,0xd5]
[0xe0,0xd8,0x3c,0xd5]
[0x00,0xd9,0x3c,0xd5]
[0x20,0xd9,0x3c,0xd5]
[0x40,0xd9,0x3c,0xd5]
[0x60,0xd9,0x3c,0xd5]
[0x80,0xd9,0x3c,0xd5]
[0xa0,0xd9,0x3c,0xd5]
[0xc0,0xd9,0x3c,0xd5]
[0xe0,0xd9,0x3c,0xd5]
[0x00,0xda,0x1c,0xd5]
[0x20,0xda,0x1c,0xd5]
[0x40,0xda,0x1c,0xd5]
[0x60,0xda,0x1c,0xd5]
[0x80,0xda,0x1c,0xd5]
[0xa0,0xda,0x1c,0xd5]
[0xc0,0xda,0x1c,0xd5]
[0xe0,0xda,0x1c,0xd5]
[0x00,0xdb,0x1c,0xd5]
[0x20,0xdb,0x1c,0xd5]
[0x40,0xdb,0x1c,0xd5]
[0x60,0xdb,0x1c,0xd5]
[0x80,0xdb,0x1c,0xd5]
[0xa0,0xdb,0x1c,0xd5]
[0xc0,0xdb,0x1c,0xd5]
[0xe0,0xdb,0x1c,0xd5]
[0x00,0xda,0x3c,0xd5]
[0x20,0xda,0x3c,0xd5]
[0x40,0xda,0x3c,0xd5]
[0x60,0xda,0x3c,0xd5]
[0x80,0xda,0x3c,0xd5]
[0xa0,0xda,0x3c,0xd5]
[0xc0,0xda,0x3c,0xd5]
[0xe0,0xda,0x3c,0xd5]
[0x00,0xdb,0x3c,0xd5]
[0x20,0xdb,0x3c,0xd5]
[0x40,0xdb,0x3c,0xd5]
[0x60,0xdb,0x3c,0xd5]
[0x80,0xdb,0x3c,0xd5]
[0xa0,0xdb,0x3c,0xd5]
[0xc0,0xdb,0x3c,0xd5]
[0xe0,0xdb,0x3c,0xd5]
// CHECK: .text
// CHECK-NEXT: msr AMEVCNTVOFF00_EL2, x0 // encoding: [0x00,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF01_EL2, x0 // encoding: [0x20,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF02_EL2, x0 // encoding: [0x40,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF03_EL2, x0 // encoding: [0x60,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF04_EL2, x0 // encoding: [0x80,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF05_EL2, x0 // encoding: [0xa0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF06_EL2, x0 // encoding: [0xc0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF07_EL2, x0 // encoding: [0xe0,0xd8,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF08_EL2, x0 // encoding: [0x00,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF09_EL2, x0 // encoding: [0x20,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF010_EL2, x0 // encoding: [0x40,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF011_EL2, x0 // encoding: [0x60,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF012_EL2, x0 // encoding: [0x80,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF013_EL2, x0 // encoding: [0xa0,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF014_EL2, x0 // encoding: [0xc0,0xd9,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF015_EL2, x0 // encoding: [0xe0,0xd9,0x1c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF00_EL2 // encoding: [0x00,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF01_EL2 // encoding: [0x20,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF02_EL2 // encoding: [0x40,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF03_EL2 // encoding: [0x60,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF04_EL2 // encoding: [0x80,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF05_EL2 // encoding: [0xa0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF06_EL2 // encoding: [0xc0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF07_EL2 // encoding: [0xe0,0xd8,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF08_EL2 // encoding: [0x00,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF09_EL2 // encoding: [0x20,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF010_EL2 // encoding: [0x40,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF011_EL2 // encoding: [0x60,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF012_EL2 // encoding: [0x80,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF013_EL2 // encoding: [0xa0,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF014_EL2 // encoding: [0xc0,0xd9,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF015_EL2 // encoding: [0xe0,0xd9,0x3c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF10_EL2, x0 // encoding: [0x00,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF11_EL2, x0 // encoding: [0x20,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF12_EL2, x0 // encoding: [0x40,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF13_EL2, x0 // encoding: [0x60,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF14_EL2, x0 // encoding: [0x80,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF15_EL2, x0 // encoding: [0xa0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF16_EL2, x0 // encoding: [0xc0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF17_EL2, x0 // encoding: [0xe0,0xda,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF18_EL2, x0 // encoding: [0x00,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF19_EL2, x0 // encoding: [0x20,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF110_EL2, x0 // encoding: [0x40,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF111_EL2, x0 // encoding: [0x60,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF112_EL2, x0 // encoding: [0x80,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF113_EL2, x0 // encoding: [0xa0,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF114_EL2, x0 // encoding: [0xc0,0xdb,0x1c,0xd5]
// CHECK-NEXT: msr AMEVCNTVOFF115_EL2, x0 // encoding: [0xe0,0xdb,0x1c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF10_EL2 // encoding: [0x00,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF11_EL2 // encoding: [0x20,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF12_EL2 // encoding: [0x40,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF13_EL2 // encoding: [0x60,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF14_EL2 // encoding: [0x80,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF15_EL2 // encoding: [0xa0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF16_EL2 // encoding: [0xc0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF17_EL2 // encoding: [0xe0,0xda,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF18_EL2 // encoding: [0x00,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF19_EL2 // encoding: [0x20,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF110_EL2 // encoding: [0x40,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF111_EL2 // encoding: [0x60,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF112_EL2 // encoding: [0x80,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF113_EL2 // encoding: [0xa0,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF114_EL2 // encoding: [0xc0,0xdb,0x3c,0xd5]
// CHECK-NEXT: mrs x0, AMEVCNTVOFF115_EL2 // encoding: [0xe0,0xdb,0x3c,0xd5]
// NOAMVS: .text
// NOAMVS-NEXT: msr S3_4_C13_C8_0, x0 // encoding: [0x00,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_1, x0 // encoding: [0x20,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_2, x0 // encoding: [0x40,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_3, x0 // encoding: [0x60,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_4, x0 // encoding: [0x80,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_5, x0 // encoding: [0xa0,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_6, x0 // encoding: [0xc0,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C8_7, x0 // encoding: [0xe0,0xd8,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_0, x0 // encoding: [0x00,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_1, x0 // encoding: [0x20,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_2, x0 // encoding: [0x40,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_3, x0 // encoding: [0x60,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_4, x0 // encoding: [0x80,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_5, x0 // encoding: [0xa0,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_6, x0 // encoding: [0xc0,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C9_7, x0 // encoding: [0xe0,0xd9,0x1c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_0 // encoding: [0x00,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_1 // encoding: [0x20,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_2 // encoding: [0x40,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_3 // encoding: [0x60,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_4 // encoding: [0x80,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_5 // encoding: [0xa0,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_6 // encoding: [0xc0,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C8_7 // encoding: [0xe0,0xd8,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_0 // encoding: [0x00,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_1 // encoding: [0x20,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_2 // encoding: [0x40,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_3 // encoding: [0x60,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_4 // encoding: [0x80,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_5 // encoding: [0xa0,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_6 // encoding: [0xc0,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C9_7 // encoding: [0xe0,0xd9,0x3c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_0, x0 // encoding: [0x00,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_1, x0 // encoding: [0x20,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_2, x0 // encoding: [0x40,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_3, x0 // encoding: [0x60,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_4, x0 // encoding: [0x80,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_5, x0 // encoding: [0xa0,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_6, x0 // encoding: [0xc0,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C10_7, x0 // encoding: [0xe0,0xda,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_0, x0 // encoding: [0x00,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_1, x0 // encoding: [0x20,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_2, x0 // encoding: [0x40,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_3, x0 // encoding: [0x60,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_4, x0 // encoding: [0x80,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_5, x0 // encoding: [0xa0,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_6, x0 // encoding: [0xc0,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: msr S3_4_C13_C11_7, x0 // encoding: [0xe0,0xdb,0x1c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_0 // encoding: [0x00,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_1 // encoding: [0x20,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_2 // encoding: [0x40,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_3 // encoding: [0x60,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_4 // encoding: [0x80,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_5 // encoding: [0xa0,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_6 // encoding: [0xc0,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C10_7 // encoding: [0xe0,0xda,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_0 // encoding: [0x00,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_1 // encoding: [0x20,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_2 // encoding: [0x40,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_3 // encoding: [0x60,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_4 // encoding: [0x80,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_5 // encoding: [0xa0,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_6 // encoding: [0xc0,0xdb,0x3c,0xd5]
// NOAMVS-NEXT: mrs x0, S3_4_C13_C11_7 // encoding: [0xe0,0xdb,0x3c,0xd5]