forked from OSchip/llvm-project
[AArch64][GlobalISel] Legalize oversize G_EXTRACT_VECTOR_ELT sources.
Also changes the fewerElements helper to use the lookthrough constant helper instead of m_ICst, since m_ICst doesn't look through extends. Differential Revision: https://reviews.llvm.org/D103227
This commit is contained in:
Amara Emerson
parent
6a2af607ad
commit
59a4ee9728
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@ -3807,7 +3807,11 @@ LegalizerHelper::fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI,
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// If the index is a constant, we can really break this down as you would
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// expect, and index into the target size pieces.
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int64_t IdxVal;
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if (mi_match(Idx, MRI, m_ICst(IdxVal))) {
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auto MaybeCst =
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getConstantVRegValWithLookThrough(Idx, MRI, /*LookThroughInstrs*/ true,
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/*HandleFConstants*/ false);
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if (MaybeCst) {
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IdxVal = MaybeCst->Value.getSExtValue();
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// Avoid out of bounds indexing the pieces.
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if (IdxVal >= VecTy.getNumElements()) {
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MIRBuilder.buildUndef(DstReg);
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@ -639,7 +639,10 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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return Query.Types[1].getNumElements() <= 16;
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},
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0, s8)
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.minScalarOrElt(0, s8); // Worst case, we need at least s8.
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.minScalarOrElt(0, s8) // Worst case, we need at least s8.
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.clampMaxNumElements(1, s64, 2)
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.clampMaxNumElements(1, s32, 4)
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.clampMaxNumElements(1, s16, 8);
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getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
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.legalIf(typeInSet(0, {v8s16, v2s32, v4s32, v2s64}));
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@ -116,7 +116,7 @@ define void @nonpow2_load_narrowing() {
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; Currently can't handle vector lengths that aren't an exact multiple of
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; natively supported vector lengths. Test that the fall-back works for those.
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; FALLBACK-WITH-REPORT-ERR-G_IMPLICIT_DEF-LEGALIZABLE: (FIXME: this is what is expected once we can legalize non-pow-of-2 G_IMPLICIT_DEF) remark: <unknown>:0:0: unable to legalize instruction: %1:_(<7 x s64>) = G_ADD %0, %0 (in function: nonpow2_vector_add_fewerelements
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %{{[0-9]+}}:_(s64) = G_EXTRACT_VECTOR_ELT %{{[0-9]+}}:_(<7 x s64>), %{{[0-9]+}}:_(s64) (in function: nonpow2_vector_add_fewerelements)
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %47:_(<14 x s64>) = G_CONCAT_VECTORS %41:_(<2 x s64>), %42:_(<2 x s64>), %43:_(<2 x s64>), %44:_(<2 x s64>), %29:_(<2 x s64>), %29:_(<2 x s64>), %29:_(<2 x s64>) (in function: nonpow2_vector_add_fewerelements)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_vector_add_fewerelements
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; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_vector_add_fewerelements:
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define void @nonpow2_vector_add_fewerelements() {
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@ -147,3 +147,101 @@ body: |
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$x0 = COPY %3(p0)
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RET_ReallyLR
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...
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---
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name: test_eve_v4s64
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body: |
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bb.0:
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liveins: $q0, $q1, $x0
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; CHECK-LABEL: name: test_eve_v4s64
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
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; CHECK: %idx:_(s32) = G_CONSTANT i32 1
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s64>), [[C]](s64)
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; CHECK: $x0 = COPY [[EVEC]](s64)
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; CHECK: RET_ReallyLR
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%0:_(<2 x s64>) = COPY $q0
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%1:_(<2 x s64>) = COPY $q1
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%concat:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>)
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%idx:_(s32) = G_CONSTANT i32 1
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%idxprom:_(s64) = G_SEXT %idx(s32)
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%3:_(s64) = G_EXTRACT_VECTOR_ELT %concat:_(<4 x s64>), %idxprom:_(s64)
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$x0 = COPY %3(s64)
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RET_ReallyLR
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...
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---
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name: test_eve_v4s64_unknown_idx
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body: |
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bb.0:
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liveins: $q0, $q1, $x0
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; CHECK-LABEL: name: test_eve_v4s64_unknown_idx
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
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; CHECK: %idx:_(s64) = COPY $x0
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; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
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; CHECK: G_STORE [[COPY]](<2 x s64>), [[FRAME_INDEX]](p0) :: (store 16 into %stack.0, align 32)
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[FRAME_INDEX]], [[C]](s64)
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; CHECK: G_STORE [[COPY1]](<2 x s64>), [[PTR_ADD]](p0) :: (store 16 into %stack.0 + 16, basealign 32)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
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; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND %idx, [[C1]]
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[AND]], [[C2]]
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; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[FRAME_INDEX]], [[MUL]](s64)
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; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[PTR_ADD1]](p0) :: (load 8)
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; CHECK: $x0 = COPY [[LOAD]](s64)
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; CHECK: RET_ReallyLR
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%0:_(<2 x s64>) = COPY $q0
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%1:_(<2 x s64>) = COPY $q1
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%concat:_(<4 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>)
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%idx:_(s64) = COPY $x0
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%3:_(s64) = G_EXTRACT_VECTOR_ELT %concat:_(<4 x s64>), %idx:_(s64)
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$x0 = COPY %3(s64)
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RET_ReallyLR
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...
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---
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name: test_eve_v8s32
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body: |
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bb.0:
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liveins: $q0, $q1, $x0
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; CHECK-LABEL: name: test_eve_v8s32
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
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; CHECK: %idx:_(s32) = G_CONSTANT i32 1
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<4 x s32>), [[C]](s64)
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; CHECK: $w0 = COPY [[EVEC]](s32)
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; CHECK: RET_ReallyLR
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%0:_(<4 x s32>) = COPY $q0
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%1:_(<4 x s32>) = COPY $q1
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%concat:_(<8 x s32>) = G_CONCAT_VECTORS %0(<4 x s32>), %1(<4 x s32>)
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%idx:_(s32) = G_CONSTANT i32 1
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%idxprom:_(s64) = G_SEXT %idx(s32)
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%3:_(s32) = G_EXTRACT_VECTOR_ELT %concat:_(<8 x s32>), %idxprom:_(s64)
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$w0 = COPY %3(s32)
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RET_ReallyLR
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...
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---
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name: test_eve_v16s16
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body: |
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bb.0:
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liveins: $q0, $q1, $x0
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; CHECK-LABEL: name: test_eve_v16s16
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; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
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; CHECK: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1
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; CHECK: %idx:_(s32) = G_CONSTANT i32 9
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[EVEC:%[0-9]+]]:_(s16) = G_EXTRACT_VECTOR_ELT [[COPY1]](<8 x s16>), [[C]](s64)
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; CHECK: %ext:_(s32) = G_ANYEXT [[EVEC]](s16)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR
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%0:_(<8 x s16>) = COPY $q0
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%1:_(<8 x s16>) = COPY $q1
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%concat:_(<16 x s16>) = G_CONCAT_VECTORS %0(<8 x s16>), %1(<8 x s16>)
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%idx:_(s32) = G_CONSTANT i32 9
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%idxprom:_(s64) = G_SEXT %idx(s32)
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%3:_(s16) = G_EXTRACT_VECTOR_ELT %concat:_(<16 x s16>), %idxprom:_(s64)
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%ext:_(s32) = G_ANYEXT %3
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$w0 = COPY %ext(s32)
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RET_ReallyLR
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...
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