forked from OSchip/llvm-project
Remove support for 'CompositeIndices' and sub-register cycles.
Now that the weird X86 sub_ss and sub_sd sub-register indexes are gone, there is no longer a need for the CompositeIndices construct in .td files. Sub-register index composition can be specified on the SubRegIndex itself using the ComposedOf field. Also enforce unique names for sub-registers in TableGen. The same sub-register cannot be available with multiple sub-register indexes. llvm-svn: 160842
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@ -64,18 +64,6 @@ class Register<string n, list<string> altNames = []> {
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// register.
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list<RegAltNameIndex> RegAltNameIndices = [];
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// CompositeIndices - Specify subreg indices that don't correspond directly to
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// a register in SubRegs and are not inherited. The following formats are
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// supported:
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//
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// (a) Identity - Reg:a == Reg
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// (a b) Alias - Reg:a == Reg:b
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// (a b,c) Composite - Reg:a == (Reg:b):c
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//
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// This can be used to disambiguate a sub-sub-register that exists in more
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// than one subregister and other weird stuff.
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list<dag> CompositeIndices = [];
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// DwarfNumbers - Numbers used internally by gcc/gdb to identify the register.
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// These values can be determined by locating the <target>.h file in the
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// directory llvmgcc/gcc/config/<target>/ and looking for REGISTER_NAMES. The
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@ -252,9 +240,6 @@ class RegisterTuples<list<SubRegIndex> Indices, list<dag> Regs> {
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// SubRegIndices - N SubRegIndex instances. This provides the names of the
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// sub-registers in the synthesized super-registers.
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list<SubRegIndex> SubRegIndices = Indices;
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// Compose sub-register indices like in a normal Register.
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list<dag> CompositeIndices = [];
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}
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@ -187,10 +187,7 @@ bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) {
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unsigned OldNumUnits = RegUnits.size();
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for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
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I != E; ++I) {
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// Strangely a register may have itself as a subreg (self-cycle) e.g. XMM.
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CodeGenRegister *SR = I->second;
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if (SR == this)
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continue;
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// Merge the subregister's units into this register's RegUnits.
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mergeRegUnits(RegUnits, SR->RegUnits);
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}
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@ -260,44 +257,6 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
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}
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}
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// Process the composites.
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ListInit *Comps = TheDef->getValueAsListInit("CompositeIndices");
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for (unsigned i = 0, e = Comps->size(); i != e; ++i) {
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DagInit *Pat = dynamic_cast<DagInit*>(Comps->getElement(i));
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if (!Pat)
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throw TGError(TheDef->getLoc(), "Invalid dag '" +
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Comps->getElement(i)->getAsString() +
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"' in CompositeIndices");
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DefInit *BaseIdxInit = dynamic_cast<DefInit*>(Pat->getOperator());
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if (!BaseIdxInit || !BaseIdxInit->getDef()->isSubClassOf("SubRegIndex"))
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throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " +
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Pat->getAsString());
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CodeGenSubRegIndex *BaseIdx = RegBank.getSubRegIdx(BaseIdxInit->getDef());
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// Resolve list of subreg indices into R2.
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CodeGenRegister *R2 = this;
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for (DagInit::const_arg_iterator di = Pat->arg_begin(),
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de = Pat->arg_end(); di != de; ++di) {
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DefInit *IdxInit = dynamic_cast<DefInit*>(*di);
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if (!IdxInit || !IdxInit->getDef()->isSubClassOf("SubRegIndex"))
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throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " +
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Pat->getAsString());
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CodeGenSubRegIndex *Idx = RegBank.getSubRegIdx(IdxInit->getDef());
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const SubRegMap &R2Subs = R2->computeSubRegs(RegBank);
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SubRegMap::const_iterator ni = R2Subs.find(Idx);
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if (ni == R2Subs.end())
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throw TGError(TheDef->getLoc(), "Composite " + Pat->getAsString() +
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" refers to bad index in " + R2->getName());
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R2 = ni->second;
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}
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// Insert composite index. Allow overriding inherited indices etc.
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SubRegs[BaseIdx] = R2;
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// R2 is no longer an orphan.
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Orphans.erase(R2);
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}
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// Now Orphans contains the inherited subregisters without a direct index.
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// Create inferred indexes for all missing entries.
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// Work backwards in the Indices vector in order to compose subregs bottom-up.
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@ -327,14 +286,25 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
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// Compute the inverse SubReg -> Idx map.
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for (SubRegMap::const_iterator SI = SubRegs.begin(), SE = SubRegs.end();
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SI != SE; ++SI) {
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// Ignore idempotent sub-register indices.
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if (SI->second == this)
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if (SI->second == this) {
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SMLoc Loc;
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if (TheDef)
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Loc = TheDef->getLoc();
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throw TGError(Loc, "Register " + getName() +
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" has itself as a sub-register");
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}
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// Ensure that every sub-register has a unique name.
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DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins =
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SubReg2Idx.insert(std::make_pair(SI->second, SI->first)).first;
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if (Ins->second == SI->first)
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continue;
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// Is is possible to have multiple names for the same sub-register.
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// For example, XMM0 appears as sub_xmm, sub_sd, and sub_ss in YMM0.
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// Eventually, this degeneration should go away, but for now we simply give
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// precedence to the explicit sub-register index over the inherited ones.
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SubReg2Idx.insert(std::make_pair(SI->second, SI->first));
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// Trouble: Two different names for SI->second.
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SMLoc Loc;
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if (TheDef)
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Loc = TheDef->getLoc();
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throw TGError(Loc, "Sub-register can't have two names: " +
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SI->second->getName() + " available as " +
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SI->first->getName() + " and " + Ins->second->getName());
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}
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// Derive possible names for sub-register concatenations from any explicit
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@ -508,8 +478,6 @@ void CodeGenRegister::computeSuperRegs(CodeGenRegBank &RegBank) {
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Id.push_back(I->first->EnumValue);
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Id.push_back(I->second->TopoSig);
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if (I->second == this)
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continue;
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// Don't add duplicate entries.
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if (!I->second->SuperRegs.empty() && I->second->SuperRegs.back() == this)
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continue;
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@ -530,8 +498,7 @@ CodeGenRegister::addSubRegsPreOrder(SetVector<const CodeGenRegister*> &OSet,
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// Add any secondary sub-registers that weren't part of the explicit tree.
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for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
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I != E; ++I)
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if (I->second != this)
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OSet.insert(I->second);
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OSet.insert(I->second);
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}
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// Compute overlapping registers.
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