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[PowerPC] add ftrunc vector tests; NFC 

Baseline tests for vectors as suggested in D44909.

llvm-svn: 328682
This commit is contained in:
Sanjay Patel 2018-03-28 00:49:12 +00:00
parent 29e6fd6785
commit 594c1546f1
1 changed files with 47 additions and 0 deletions
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47
llvm/test/CodeGen/PowerPC/ftrunc-vec.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs < %s | FileCheck %s
define <4 x float> @truncf32(<4 x float> %a) {
; CHECK-LABEL: truncf32:
; CHECK: # %bb.0:
; CHECK-NEXT: xvcvspsxws 0, 34
; CHECK-NEXT: xvcvsxwsp 34, 0
; CHECK-NEXT: blr
%t0 = fptosi <4 x float> %a to <4 x i32>
%t1 = sitofp <4 x i32> %t0 to <4 x float>
ret <4 x float> %t1
}
define <2 x double> @truncf64(<2 x double> %a) {
; CHECK-LABEL: truncf64:
; CHECK: # %bb.0:
; CHECK-NEXT: xvcvdpsxds 34, 34
; CHECK-NEXT: xvcvsxddp 34, 34
; CHECK-NEXT: blr
%t0 = fptosi <2 x double> %a to <2 x i64>
%t1 = sitofp <2 x i64> %t0 to <2 x double>
ret <2 x double> %t1
}
define <4 x float> @truncf32u(<4 x float> %a) {
; CHECK-LABEL: truncf32u:
; CHECK: # %bb.0:
; CHECK-NEXT: xvcvspuxws 0, 34
; CHECK-NEXT: xvcvuxwsp 34, 0
; CHECK-NEXT: blr
%t0 = fptoui <4 x float> %a to <4 x i32>
%t1 = uitofp <4 x i32> %t0 to <4 x float>
ret <4 x float> %t1
}
define <2 x double> @truncf64u(<2 x double> %a) {
; CHECK-LABEL: truncf64u:
; CHECK: # %bb.0:
; CHECK-NEXT: xvcvdpuxds 34, 34
; CHECK-NEXT: xvcvuxddp 34, 34
; CHECK-NEXT: blr
%t0 = fptoui <2 x double> %a to <2 x i64>
%t1 = uitofp <2 x i64> %t0 to <2 x double>
ret <2 x double> %t1
}