forked from OSchip/llvm-project
parent
dfb97383d5
commit
59213d64e5
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@ -552,10 +552,12 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
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default:
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abort(); // FIXME:
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case TargetInstrInfo::INLINEASM: {
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const char* Value = MI.getOperand(0).getSymbolName();
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/* We allow inline assembler nodes with empty bodies - they can
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implicitly define registers, which is ok for JIT. */
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assert((Value[0] == 0) && "JIT does not support inline asm!\n");
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// We allow inline assembler nodes with empty bodies - they can
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// implicitly define registers, which is ok for JIT.
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if (MI.getOperand(0).getSymbolName()[0]) {
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assert(0 && "JIT does not support inline asm!\n");
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abort();
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}
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break;
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}
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case TargetInstrInfo::DBG_LABEL:
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