forked from OSchip/llvm-project
Restore some "small section" support code, reverting my patch from r76936.
llvm-svn: 78894
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e5801bd220
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@ -210,6 +210,37 @@ AddLiveIn(MachineFunction &MF, unsigned PReg, TargetRegisterClass *RC)
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return VReg;
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}
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// A address must be loaded from a small section if its size is less than the
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// small section size threshold. Data in this section must be addressed using
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// gp_rel operator.
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bool MipsTargetLowering::IsInSmallSection(unsigned Size) {
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return (Size > 0 && (Size <= Subtarget->getSSectionThreshold()));
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}
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// Discover if this global address can be placed into small data/bss section.
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bool MipsTargetLowering::IsGlobalInSmallSection(GlobalValue *GV)
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{
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const TargetData *TD = getTargetData();
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const GlobalVariable *GVA = dyn_cast<GlobalVariable>(GV);
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if (!GVA)
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return false;
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const Type *Ty = GV->getType()->getElementType();
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unsigned Size = TD->getTypeAllocSize(Ty);
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// if this is a internal constant string, there is a special
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// section for it, but not in small data/bss.
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if (GVA->hasInitializer() && GV->hasLocalLinkage()) {
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Constant *C = GVA->getInitializer();
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const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
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if (CVA && CVA->isCString())
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return false;
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}
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return IsInSmallSection(Size);
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}
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// Get fp branch code (not opcode) from condition code.
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static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) {
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if (CC >= Mips::FCOND_F && CC <= Mips::FCOND_NGT)
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@ -485,17 +516,23 @@ LowerSELECT(SDValue Op, SelectionDAG &DAG)
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Cond, True, False, CCNode);
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}
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SDValue MipsTargetLowering::
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LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
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{
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SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) {
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// FIXME there isn't actually debug info here
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DebugLoc dl = Op.getDebugLoc();
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GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
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SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
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if (getTargetMachine().getRelocationModel() != Reloc::PIC_) {
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SDVTList VTs = DAG.getVTList(MVT::i32);
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// %gp_rel relocation
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if (!isa<Function>(GV) && IsGlobalInSmallSection(GV)) {
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SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, dl, VTs, &GA, 1);
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SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(MVT::i32);
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return DAG.getNode(ISD::ADD, dl, MVT::i32, GOT, GPRelNode);
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}
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// %hi/%lo relocation
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SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, MVT::i32, GA);
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SDValue HiPart = DAG.getNode(MipsISD::Hi, dl, VTs, &GA, 1);
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SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, GA);
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return DAG.getNode(ISD::ADD, dl, MVT::i32, HiPart, Lo);
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@ -66,8 +66,8 @@ namespace llvm {
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//===--------------------------------------------------------------------===//
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// TargetLowering Implementation
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//===--------------------------------------------------------------------===//
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class MipsTargetLowering : public TargetLowering
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{
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class MipsTargetLowering : public TargetLowering {
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public:
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explicit MipsTargetLowering(MipsTargetMachine &TM);
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@ -88,6 +88,9 @@ namespace llvm {
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// Subtarget Info
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const MipsSubtarget *Subtarget;
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bool IsGlobalInSmallSection(GlobalValue *GV);
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bool IsInSmallSection(unsigned Size);
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// Lower Operand helpers
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SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
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unsigned CallConv, bool isVarArg,
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@ -17,6 +17,11 @@
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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static cl::opt<unsigned>
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SSThreshold("mips-ssection-threshold", cl::Hidden,
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cl::desc("Small data and bss section threshold size (default=8)"),
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cl::init(8));
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MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
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bool little) :
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MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
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@ -30,6 +35,9 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
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// Parse features string.
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ParseSubtargetFeatures(FS, CPU);
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// Small section size threshold
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SSectionThreshold = SSThreshold;
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// Is the target system Linux ?
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if (TT.find("linux") == std::string::npos)
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IsLinux = false;
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@ -60,6 +60,10 @@ protected:
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// isLinux - Target system is Linux. Is false we consider ELFOS for now.
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bool IsLinux;
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// Put global and static items less than or equal to SSectionThreshold
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// bytes into the small data or bss section. The default is 8.
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unsigned SSectionThreshold;
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/// Features related to the presence of specific instructions.
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// HasSEInReg - SEB and SEH (signext in register) instructions.
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@ -109,6 +113,7 @@ public:
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bool isNotSingleFloat() const { return !IsSingleFloat; };
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bool hasVFPU() const { return HasVFPU; };
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bool isLinux() const { return IsLinux; };
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unsigned getSSectionThreshold() const { return SSectionThreshold; }
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/// Features related to the presence of specific instructions.
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bool hasSEInReg() const { return HasSEInReg; };
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