forked from OSchip/llvm-project
[X86] Update doxygen comments for AVX512BF16 to not refer to masks as 'immediates'. Refer to parameter names instead of 'src', 'src1', 'src2'. NFC
llvm-svn: 360918
This commit is contained in:
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d18f58166c
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58964566e0
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@ -31,7 +31,7 @@ typedef short __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
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/// \param __B
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/// A 512-bit vector of [16 x float].
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/// \returns A 512-bit vector of [32 x bfloat] whose lower 256 bits come from
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/// convertion of src2, and higher 256 bits come from conversion of src1.
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/// conversion of __B, and higher 256 bits come from conversion of __A.
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static __inline__ __m512bh __DEFAULT_FN_ATTRS512
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_mm512_cvtne2ps_pbh(__m512 __A, __m512 __B) {
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return (__m512bh)__builtin_ia32_cvtne2ps2bf16_512((__v16sf) __A,
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@ -51,10 +51,10 @@ _mm512_cvtne2ps_pbh(__m512 __A, __m512 __B) {
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/// \param __W
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/// A 512-bit vector of [32 x bfloat].
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/// \param __U
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/// An immediate value containing an 32-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means __W.
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/// A 32-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element from __W.
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/// \returns A 512-bit vector of [32 x bfloat] whose lower 256 bits come from
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/// convertion of src2, and higher 256 bits come from conversion of src1.
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/// conversion of __B, and higher 256 bits come from conversion of __A.
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static __inline__ __m512bh __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtne2ps_pbh(__m512bh __W, __mmask32 __U, __m512 __A, __m512 __B) {
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return (__m512bh)__builtin_ia32_selectw_512((__mmask32)__U,
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@ -73,10 +73,10 @@ _mm512_mask_cvtne2ps_pbh(__m512bh __W, __mmask32 __U, __m512 __A, __m512 __B) {
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/// \param __B
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/// A 512-bit vector of [16 x float].
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/// \param __U
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/// An immediate value containing an 32-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means zero.
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/// A 32-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element is zero.
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/// \returns A 512-bit vector of [32 x bfloat] whose lower 256 bits come from
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/// convertion of src2, and higher 256 bits come from conversion of src1.
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/// conversion of __B, and higher 256 bits come from conversion of __A.
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static __inline__ __m512bh __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtne2ps_pbh(__mmask32 __U, __m512 __A, __m512 __B) {
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return (__m512bh)__builtin_ia32_selectw_512((__mmask32)__U,
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@ -92,7 +92,7 @@ _mm512_maskz_cvtne2ps_pbh(__mmask32 __U, __m512 __A, __m512 __B) {
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///
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/// \param __A
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/// A 512-bit vector of [16 x float].
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/// \returns A 256-bit vector of [16 x bfloat] come from convertion of src
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/// \returns A 256-bit vector of [16 x bfloat] come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS512
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_mm512_cvtneps_pbh(__m512 __A) {
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return (__m256bh)__builtin_ia32_cvtneps2bf16_512((__v16sf) __A);
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@ -109,9 +109,9 @@ _mm512_cvtneps_pbh(__m512 __A) {
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/// \param __W
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/// A 256-bit vector of [16 x bfloat].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A, 0 means __W.
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/// \returns A 256-bit vector of [16 x bfloat] come from convertion of src
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element from __W.
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/// \returns A 256-bit vector of [16 x bfloat] come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS512
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_mm512_mask_cvtneps_pbh(__m256bh __W, __mmask16 __U, __m512 __A) {
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return (__m256bh)__builtin_ia32_selectw_256((__mmask16)__U,
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@ -128,9 +128,9 @@ _mm512_mask_cvtneps_pbh(__m256bh __W, __mmask16 __U, __m512 __A) {
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/// \param __A
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/// A 512-bit vector of [16 x float].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A, 0 means zero.
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/// \returns A 256-bit vector of [16 x bfloat] come from convertion of src
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element is zero.
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/// \returns A 256-bit vector of [16 x bfloat] come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS512
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_mm512_maskz_cvtneps_pbh(__mmask16 __U, __m512 __A) {
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return (__m256bh)__builtin_ia32_selectw_256((__mmask16)__U,
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@ -172,8 +172,8 @@ _mm512_dpbf16_ps(__m512 __D, __m512bh __A, __m512bh __B) {
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/// \param __D
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/// A 512-bit vector of [16 x float].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means __D.
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D.
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/// \returns A 512-bit vector of [16 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m512 __DEFAULT_FN_ATTRS512
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@ -196,8 +196,8 @@ _mm512_mask_dpbf16_ps(__m512 __D, __mmask16 __U, __m512bh __A, __m512bh __B) {
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/// \param __D
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/// A 512-bit vector of [16 x float].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means 0.
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0.
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/// \returns A 512-bit vector of [16 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m512 __DEFAULT_FN_ATTRS512
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@ -33,7 +33,7 @@ typedef short __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
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/// \param __B
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/// A 128-bit vector of [4 x float].
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src2, and higher 64 bits come from conversion of src1.
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/// conversion of __B, and higher 64 bits come from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_cvtne2ps_pbh(__m128 __A, __m128 __B) {
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return (__m128bh)__builtin_ia32_cvtne2ps2bf16_128((__v4sf) __A,
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@ -53,10 +53,10 @@ _mm_cvtne2ps_pbh(__m128 __A, __m128 __B) {
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/// \param __W
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/// A 128-bit vector of [8 x bfloat].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means __W.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element from __W.
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src2, and higher 64 bits come from conversion of src1.
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/// conversion of __B, and higher 64 bits come from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_mask_cvtne2ps_pbh(__m128bh __W, __mmask8 __U, __m128 __A, __m128 __B) {
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return (__m128bh)__builtin_ia32_selectw_128((__mmask8)__U,
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@ -75,10 +75,10 @@ _mm_mask_cvtne2ps_pbh(__m128bh __W, __mmask8 __U, __m128 __A, __m128 __B) {
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/// \param __B
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/// A 128-bit vector of [4 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means zero.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element is zero.
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src2, and higher 64 bits come from conversion of src1.
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/// conversion of __B, and higher 64 bits come from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_maskz_cvtne2ps_pbh(__mmask8 __U, __m128 __A, __m128 __B) {
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return (__m128bh)__builtin_ia32_selectw_128((__mmask8)__U,
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@ -97,7 +97,7 @@ _mm_maskz_cvtne2ps_pbh(__mmask8 __U, __m128 __A, __m128 __B) {
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/// \param __B
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/// A 256-bit vector of [8 x float].
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/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from
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/// convertion of src2, and higher 128 bits come from conversion of src1.
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/// conversion of __B, and higher 128 bits come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS256
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_mm256_cvtne2ps_pbh(__m256 __A, __m256 __B) {
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return (__m256bh)__builtin_ia32_cvtne2ps2bf16_256((__v8sf) __A,
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@ -117,10 +117,10 @@ _mm256_cvtne2ps_pbh(__m256 __A, __m256 __B) {
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/// \param __W
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/// A 256-bit vector of [16 x bfloat].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means __W.
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element from __W.
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/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from
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/// convertion of src2, and higher 128 bits come from conversion of src1.
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/// conversion of __B, and higher 128 bits come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS256
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_mm256_mask_cvtne2ps_pbh(__m256bh __W, __mmask16 __U, __m256 __A, __m256 __B) {
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return (__m256bh)__builtin_ia32_selectw_256((__mmask16)__U,
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@ -139,10 +139,10 @@ _mm256_mask_cvtne2ps_pbh(__m256bh __W, __mmask16 __U, __m256 __A, __m256 __B) {
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/// \param __B
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/// A 256-bit vector of [8 x float].
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/// \param __U
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/// An immediate value containing an 16-bit value specifying which element
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/// is choosed. 1 means __A or __B, 0 means zero.
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A or __B. A 0 means element is zero.
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/// \returns A 256-bit vector of [16 x bfloat] whose lower 128 bits come from
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/// convertion of src2, and higher 128 bits come from conversion of src1.
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/// conversion of __B, and higher 128 bits come from conversion of __A.
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static __inline__ __m256bh __DEFAULT_FN_ATTRS256
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_mm256_maskz_cvtne2ps_pbh(__mmask16 __U, __m256 __A, __m256 __B) {
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return (__m256bh)__builtin_ia32_selectw_256((__mmask16)__U,
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@ -159,7 +159,7 @@ _mm256_maskz_cvtne2ps_pbh(__mmask16 __U, __m256 __A, __m256 __B) {
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/// \param __A
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/// A 128-bit vector of [4 x float].
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src, and higher 64 bits are 0.
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/// conversion of __A, and higher 64 bits are 0.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_cvtneps_pbh(__m128 __A) {
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return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A,
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@ -178,10 +178,10 @@ _mm_cvtneps_pbh(__m128 __A) {
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/// \param __W
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/// A 128-bit vector of [8 x bfloat].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A, 0 means __W.
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/// A 4-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element from __W.
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src, and higher 64 bits are 0.
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/// conversion of __A, and higher 64 bits are 0.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m128 __A) {
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return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A,
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@ -198,10 +198,10 @@ _mm_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m128 __A) {
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/// \param __A
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/// A 128-bit vector of [4 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A, 0 means 0.
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/// A 4-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element is zero.
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/// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
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/// convertion of src, and higher 64 bits are 0.
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/// conversion of __A, and higher 64 bits are 0.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS128
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_mm_maskz_cvtneps_pbh(__mmask8 __U, __m128 __A) {
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return (__m128bh)__builtin_ia32_cvtneps2bf16_128_mask((__v4sf) __A,
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@ -217,7 +217,7 @@ _mm_maskz_cvtneps_pbh(__mmask8 __U, __m128 __A) {
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///
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/// \param __A
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/// A 256-bit vector of [8 x float].
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/// \returns A 128-bit vector of [8 x bfloat] comes from convertion of src.
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/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS256
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_mm256_cvtneps_pbh(__m256 __A) {
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return (__m128bh)__builtin_ia32_cvtneps2bf16_256((__v8sf)__A);
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@ -234,9 +234,9 @@ _mm256_cvtneps_pbh(__m256 __A) {
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/// \param __W
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/// A 256-bit vector of [8 x bfloat].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A, 0 means __W.
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/// \returns A 128-bit vector of [8 x bfloat] comes from convertion of src.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element from __W.
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/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS256
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_mm256_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m256 __A) {
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return (__m128bh)__builtin_ia32_selectw_128((__mmask8)__U,
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@ -253,9 +253,9 @@ _mm256_mask_cvtneps_pbh(__m128bh __W, __mmask8 __U, __m256 __A) {
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/// \param __A
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/// A 256-bit vector of [8 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A, 0 means __W.
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/// \returns A 128-bit vector of [8 x bfloat] comes from convertion of src.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means conversion of __A. A 0 means element is zero.
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/// \returns A 128-bit vector of [8 x bfloat] comes from conversion of __A.
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static __inline__ __m128bh __DEFAULT_FN_ATTRS256
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_mm256_maskz_cvtneps_pbh(__mmask8 __U, __m256 __A) {
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return (__m128bh)__builtin_ia32_selectw_128((__mmask8)__U,
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@ -297,8 +297,8 @@ _mm_dpbf16_ps(__m128 __D, __m128bh __A, __m128bh __B) {
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/// \param __D
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/// A 128-bit vector of [4 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means __D.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D.
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/// \returns A 128-bit vector of [4 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m128 __DEFAULT_FN_ATTRS128
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/// \param __D
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/// A 128-bit vector of [4 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means 0.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0.
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/// \returns A 128-bit vector of [4 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m128 __DEFAULT_FN_ATTRS128
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/// \param __D
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/// A 256-bit vector of [8 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means __D.
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/// A 16-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means __D.
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/// \returns A 256-bit vector of [8 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m256 __DEFAULT_FN_ATTRS256
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@ -390,8 +390,8 @@ _mm256_mask_dpbf16_ps(__m256 __D, __mmask8 __U, __m256bh __A, __m256bh __B) {
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/// \param __D
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/// A 256-bit vector of [8 x float].
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/// \param __U
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/// An immediate value containing an 8-bit value specifying which element
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/// is choosed. 1 means __A and __B's dot product, 0 means 0.
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/// A 8-bit mask value specifying what is chosen for each element.
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/// A 1 means __A and __B's dot product accumulated with __D. A 0 means 0.
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/// \returns A 256-bit vector of [8 x float] comes from Dot Product of
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/// __A, __B and __D
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static __inline__ __m256 __DEFAULT_FN_ATTRS256
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@ -400,6 +400,7 @@ _mm256_maskz_dpbf16_ps(__mmask8 __U, __m256 __D, __m256bh __A, __m256bh __B) {
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(__v8sf)_mm256_dpbf16_ps(__D, __A, __B),
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(__v8sf)_mm256_setzero_si256());
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}
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#undef __DEFAULT_FN_ATTRS128
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#undef __DEFAULT_FN_ATTRS256
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