forked from OSchip/llvm-project
Fix the arm's disassembler for blx that was building an MCInst without the
needed two predicate operands before the imm operand. llvm-svn: 126662
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@ -1719,6 +1719,17 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
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return true;
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}
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// Some instructions have predicate operands first before the immediate.
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if(Opcode == ARM::tBLXi_r9 || Opcode == ARM::tBLr9) {
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// Handling the two predicate operands before the imm operand.
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if (B->DoPredicateOperands(MI, Opcode, insn, NumOps))
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NumOpsAdded += 2;
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else {
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DEBUG(errs() << "Expected predicate operands not found.\n");
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return false;
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}
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}
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// Add the imm operand.
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int Offset = 0;
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@ -1745,7 +1756,8 @@ static bool DisassembleThumb2BrMiscCtrl(MCInst &MI, unsigned Opcode,
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// to compensate.
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MI.addOperand(MCOperand::CreateImm(Offset + 4));
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NumOpsAdded = 1;
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// This is an increment as some predicate operands may have been added first.
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NumOpsAdded += 1;
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return true;
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}
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@ -118,3 +118,6 @@
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# CHECK: msr cpsr_fc, r0
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0x80 0xf3 0x00 0x89
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# CHECK: blx #0
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0xff 0xf7 0xfe 0xef
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