forked from OSchip/llvm-project
[RISCV] Remove check and update test file in D121183
Differential Revision: https://reviews.llvm.org/D122290
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@ -80,16 +80,7 @@ static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT,
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if (CPU.empty() || CPU == "generic")
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if (CPU.empty() || CPU == "generic")
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CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
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CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
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MCSubtargetInfo *STI =
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return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
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createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
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// Check if Feature string is valid
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auto ISAInfo =
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RISCVFeatures::parseFeatureBits(TT.isArch64Bit(), STI->getFeatureBits());
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if (!ISAInfo)
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report_fatal_error(ISAInfo.takeError());
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else
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return STI;
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}
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}
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static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,
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static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,
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@ -2,4 +2,4 @@
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; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
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; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
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; RUN: | FileCheck -check-prefix=RV64E %s
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; RUN: | FileCheck -check-prefix=RV64E %s
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; RV64E: LLVM ERROR: standard user-level extension 'e' requires 'rv32'
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; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target
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@ -1,4 +1,4 @@
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# RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
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# RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
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# RUN: | FileCheck %s -check-prefix=RV64E
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# RUN: | FileCheck %s -check-prefix=RV64E
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# RV64E: LLVM ERROR: standard user-level extension 'e' requires 'rv32'
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# RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target
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