forked from OSchip/llvm-project
[X86][x32] Save callee-save register used as base pointer for x32 ABI
For the x32 ABI, since the base pointer register (EBX) is a callee save register it should be saved before use. This fixes https://bugs.llvm.org/show_bug.cgi?id=36011 Differential Revision: https://reviews.llvm.org/D42358 Patch by Pratik Bhatu llvm-svn: 326593
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@ -2108,8 +2108,12 @@ void X86FrameLowering::determineCalleeSaves(MachineFunction &MF,
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TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
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// Spill the BasePtr if it's used.
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if (TRI->hasBasePointer(MF))
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SavedRegs.set(TRI->getBaseRegister());
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if (TRI->hasBasePointer(MF)){
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unsigned BasePtr = TRI->getBaseRegister();
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if (STI.isTarget64BitILP32())
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BasePtr = getX86SubSuperRegister(BasePtr, 64);
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SavedRegs.set(BasePtr);
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}
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}
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static bool
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@ -39,6 +39,7 @@ define void @base() #0 {
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; X32ABI: # %bb.0: # %entry
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; X32ABI-NEXT: pushq %rbp
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; X32ABI-NEXT: movl %esp, %ebp
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; X32ABI-NEXT: pushq %rbx
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; X32ABI-NEXT: andl $-32, %esp
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; X32ABI-NEXT: subl $32, %esp
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; X32ABI-NEXT: movl %esp, %ebx
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@ -52,7 +53,8 @@ define void @base() #0 {
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; X32ABI-NEXT: movl %edx, %esp
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; X32ABI-NEXT: negl %eax
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; X32ABI-NEXT: movl $0, (%ecx,%eax)
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; X32ABI-NEXT: movl %ebp, %esp
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; X32ABI-NEXT: leal -8(%ebp), %esp
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; X32ABI-NEXT: popq %rbx
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; X32ABI-NEXT: popq %rbp
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; X32ABI-NEXT: retq
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entry:
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