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[Test] Add one more test for patch [SLP]Improve reductions analysis and emission, part 1. 

The original patch leads to malformed phis on this test. Make sure
we're safeguarded from its return until it is fixed.
This commit is contained in:
Max Kazantsev 2022-04-20 13:55:48 +07:00
parent c952754206
commit 57d17795b9
1 changed files with 60 additions and 0 deletions
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60
llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll Normal file
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@ -0,0 +1,60 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -slp-vectorizer < %s | FileCheck %s
; RUN: opt -S -passes=slp-vectorizer < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"
; Make sure we do not generate malformed phis not in the beginning of block.
define void @test() #0 {
; CHECK-LABEL: @test(
; CHECK-NEXT: bb:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[TMP:%.*]] = phi i32 [ undef, [[BB1]] ], [ undef, [[BB:%.*]] ]
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP18:%.*]], [[BB1]] ], [ undef, [[BB]] ]
; CHECK-NEXT: [[TMP3:%.*]] = mul i32 undef, [[TMP]]
; CHECK-NEXT: [[TMP4:%.*]] = mul i32 [[TMP3]], [[TMP]]
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP4]], [[TMP]]
; CHECK-NEXT: [[TMP6:%.*]] = mul i32 [[TMP5]], [[TMP]]
; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[TMP6]], [[TMP]]
; CHECK-NEXT: [[TMP8:%.*]] = mul i32 [[TMP7]], [[TMP]]
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[TMP8]], [[TMP]]
; CHECK-NEXT: [[TMP10:%.*]] = mul i32 [[TMP9]], [[TMP]]
; CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP10]], [[TMP]]
; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[TMP11]], [[TMP]]
; CHECK-NEXT: [[TMP13:%.*]] = mul i32 [[TMP12]], [[TMP]]
; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[TMP13]], [[TMP]]
; CHECK-NEXT: [[TMP15:%.*]] = mul i32 [[TMP14]], [[TMP]]
; CHECK-NEXT: [[TMP16:%.*]] = mul i32 [[TMP15]], [[TMP]]
; CHECK-NEXT: [[TMP17:%.*]] = mul i32 [[TMP16]], [[TMP]]
; CHECK-NEXT: [[TMP18]] = mul i32 [[TMP17]], [[TMP]]
; CHECK-NEXT: br label [[BB1]]
;
bb:
br label %bb1
bb1: ; preds = %bb1, %bb
%tmp = phi i32 [ undef, %bb1 ], [ undef, %bb ]
%tmp2 = phi i32 [ %tmp18, %bb1 ], [ undef, %bb ]
%tmp3 = mul i32 undef, %tmp
%tmp4 = mul i32 %tmp3, %tmp
%tmp5 = mul i32 %tmp4, %tmp
%tmp6 = mul i32 %tmp5, %tmp
%tmp7 = mul i32 %tmp6, %tmp
%tmp8 = mul i32 %tmp7, %tmp
%tmp9 = mul i32 %tmp8, %tmp
%tmp10 = mul i32 %tmp9, %tmp
%tmp11 = mul i32 %tmp10, %tmp
%tmp12 = mul i32 %tmp11, %tmp
%tmp13 = mul i32 %tmp12, %tmp
%tmp14 = mul i32 %tmp13, %tmp
%tmp15 = mul i32 %tmp14, %tmp
%tmp16 = mul i32 %tmp15, %tmp
%tmp17 = mul i32 %tmp16, %tmp
%tmp18 = mul i32 %tmp17, %tmp
br label %bb1
}
attributes #0 = { "target-features"="+sse4.1" }