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Long double patch 7 of N, unless I lost count:). 

Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)

llvm-svn: 40886
This commit is contained in:
Dale Johannesen 2007-08-07 01:17:37 +00:00
parent a64832f60e
commit 57c6ac5fe5
3 changed files with 37 additions and 1 deletions
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6
llvm/lib/Target/X86/X86FloatingPoint.cpp
View File

@ -401,10 +401,13 @@ static const TableEntry OpcodeTable[] = {
{ X86::ILD_Fp64m80 , X86::ILD_F64m },
{ X86::ISTT_Fp16m32 , X86::ISTT_FP16m},
{ X86::ISTT_Fp16m64 , X86::ISTT_FP16m},
{ X86::ISTT_Fp16m80 , X86::ISTT_FP16m},
{ X86::ISTT_Fp32m32 , X86::ISTT_FP32m},
{ X86::ISTT_Fp32m64 , X86::ISTT_FP32m},
{ X86::ISTT_Fp32m80 , X86::ISTT_FP32m},
{ X86::ISTT_Fp64m32 , X86::ISTT_FP64m},
{ X86::ISTT_Fp64m64 , X86::ISTT_FP64m},
{ X86::ISTT_Fp64m80 , X86::ISTT_FP64m},
{ X86::IST_Fp16m32 , X86::IST_F16m },
{ X86::IST_Fp16m64 , X86::IST_F16m },
{ X86::IST_Fp16m80 , X86::IST_F16m },
@ -616,6 +619,9 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
MI->getOpcode() == X86::ISTT_Fp16m64 ||
MI->getOpcode() == X86::ISTT_Fp32m64 ||
MI->getOpcode() == X86::ISTT_Fp64m64 ||
MI->getOpcode() == X86::ISTT_Fp16m80 ||
MI->getOpcode() == X86::ISTT_Fp32m80 ||
MI->getOpcode() == X86::ISTT_Fp64m80 ||
MI->getOpcode() == X86::ST_FpP80m)) {
duplicateToTop(Reg, 7 /*temp register*/, I);
} else {

8
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -4603,7 +4603,10 @@ X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
case X86::FP32_TO_INT64_IN_MEM:
case X86::FP64_TO_INT16_IN_MEM:
case X86::FP64_TO_INT32_IN_MEM:
case X86::FP64_TO_INT64_IN_MEM: {
case X86::FP64_TO_INT64_IN_MEM:
case X86::FP80_TO_INT16_IN_MEM:
case X86::FP80_TO_INT32_IN_MEM:
case X86::FP80_TO_INT64_IN_MEM: {
// Change the floating point control register to use "round towards zero"
// mode when truncating to an integer value.
MachineFunction *F = BB->getParent();
@ -4636,6 +4639,9 @@ X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
case X86::FP64_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m64; break;
case X86::FP64_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m64; break;
case X86::FP64_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m64; break;
case X86::FP80_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m80; break;
case X86::FP80_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m80; break;
case X86::FP80_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m80; break;
}
X86AddressMode AM;

24
llvm/lib/Target/X86/X86InstrFPStack.td
View File

@ -98,6 +98,18 @@ let usesCustomDAGSchedInserter = 1 in { // Expanded by the scheduler.
(outs), (ins i64mem:$dst, RFP64:$src),
"#FP64_TO_INT64_IN_MEM PSEUDO!",
[(X86fp_to_i64mem RFP64:$src, addr:$dst)]>;
def FP80_TO_INT16_IN_MEM : I<0, Pseudo,
(outs), (ins i16mem:$dst, RFP80:$src),
"#FP80_TO_INT16_IN_MEM PSEUDO!",
[(X86fp_to_i16mem RFP80:$src, addr:$dst)]>;
def FP80_TO_INT32_IN_MEM : I<0, Pseudo,
(outs), (ins i32mem:$dst, RFP80:$src),
"#FP80_TO_INT32_IN_MEM PSEUDO!",
[(X86fp_to_i32mem RFP80:$src, addr:$dst)]>;
def FP80_TO_INT64_IN_MEM : I<0, Pseudo,
(outs), (ins i64mem:$dst, RFP80:$src),
"#FP80_TO_INT64_IN_MEM PSEUDO!",
[(X86fp_to_i64mem RFP80:$src, addr:$dst)]>;
}
let isTerminator = 1 in
@ -414,6 +426,15 @@ def ISTT_Fp32m64 : FpI_<(outs), (ins i32mem:$op, RFP64:$src), OneArgFP,
def ISTT_Fp64m64 : FpI_<(outs), (ins i64mem:$op, RFP64:$src), OneArgFP,
[(X86fp_to_i64mem RFP64:$src, addr:$op)]>,
Requires<[HasSSE3]>;
def ISTT_Fp16m80 : FpI_<(outs), (ins i16mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i16mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
def ISTT_Fp32m80 : FpI_<(outs), (ins i32mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i32mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
def ISTT_Fp64m80 : FpI_<(outs), (ins i64mem:$op, RFP80:$src), OneArgFP,
[(X86fp_to_i64mem RFP80:$src, addr:$op)]>,
Requires<[HasSSE3]>;
def ISTT_FP16m : FPI<0xDF, MRM1m, (outs), (ins i16mem:$dst), "fisttp{s}\t$dst">;
def ISTT_FP32m : FPI<0xDB, MRM1m, (outs), (ins i32mem:$dst), "fisttp{l}\t$dst">;
@ -498,6 +519,9 @@ def : Pat<(X86fld addr:$src, f80), (LD_Fp80m addr:$src)>;
def : Pat<(X86fst RFP32:$src, addr:$op, f32), (ST_Fp32m addr:$op, RFP32:$src)>;
def : Pat<(X86fst RFP64:$src, addr:$op, f32), (ST_Fp64m32 addr:$op, RFP64:$src)>;
def : Pat<(X86fst RFP64:$src, addr:$op, f64), (ST_Fp64m addr:$op, RFP64:$src)>;
def : Pat<(X86fst RFP80:$src, addr:$op, f32), (ST_Fp80m32 addr:$op, RFP80:$src)>;
def : Pat<(X86fst RFP80:$src, addr:$op, f64), (ST_Fp80m64 addr:$op, RFP80:$src)>;
def : Pat<(X86fst RFP80:$src, addr:$op, f80), (ST_FpP80m addr:$op, RFP80:$src)>;
// Floating point constant -0.0 and -1.0
def : Pat<(f32 fpimmneg0), (CHS_Fp32 (LD_Fp032))>, Requires<[FPStack]>;