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AMDGPU: Split R600 MCInst lowering into its own class 

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47307

llvm-svn: 333439
This commit is contained in:
Tom Stellard 2018-05-29 17:41:59 +00:00
parent 7d3f9a88b9
commit 57b9342c80
1 changed files with 29 additions and 5 deletions
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34
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
View File

@ -41,14 +41,14 @@ namespace {
class AMDGPUMCInstLower { class AMDGPUMCInstLower {
MCContext &Ctx; MCContext &Ctx;
const AMDGPUSubtarget &ST; const TargetSubtargetInfo &ST;
const AsmPrinter ≈ const AsmPrinter ≈
const MCExpr *getLongBranchBlockExpr(const MachineBasicBlock &SrcBB, const MCExpr *getLongBranchBlockExpr(const MachineBasicBlock &SrcBB,
const MachineOperand &MO) const; const MachineOperand &MO) const;
public: public:
AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST, AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
const AsmPrinter &AP); const AsmPrinter &AP);
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
@ -58,11 +58,22 @@ public:
}; };
class R600MCInstLower : public AMDGPUMCInstLower {
public:
R600MCInstLower(MCContext &ctx, const R600Subtarget &ST,
const AsmPrinter &AP);
/// Lower a MachineInstr to an MCInst
void lower(const MachineInstr *MI, MCInst &OutMI) const;
};
} // End anonymous namespace } // End anonymous namespace
#include "AMDGPUGenMCPseudoLowering.inc" #include "AMDGPUGenMCPseudoLowering.inc"
AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st, AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx,
const TargetSubtargetInfo &st,
const AsmPrinter &ap): const AsmPrinter &ap):
Ctx(ctx), ST(st), AP(ap) { } Ctx(ctx), ST(st), AP(ap) { }
@ -153,7 +164,7 @@ bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const { void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
unsigned Opcode = MI->getOpcode(); unsigned Opcode = MI->getOpcode();
const auto *TII = ST.getInstrInfo(); const auto *TII = static_cast<const SIInstrInfo*>(ST.getInstrInfo());
// FIXME: Should be able to handle this with emitPseudoExpansionLowering. We // FIXME: Should be able to handle this with emitPseudoExpansionLowering. We
// need to select it to the subtarget specific version, and there's no way to // need to select it to the subtarget specific version, and there's no way to
@ -325,9 +336,22 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} }
} }
R600MCInstLower::R600MCInstLower(MCContext &Ctx, const R600Subtarget &ST,
const AsmPrinter &AP) :
AMDGPUMCInstLower(Ctx, ST, AP) { }
void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
OutMI.setOpcode(MI->getOpcode());
for (const MachineOperand &MO : MI->explicit_operands()) {
MCOperand MCOp;
lowerOperand(MO, MCOp);
OutMI.addOperand(MCOp);
}
}
void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) { void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>(); const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>();
AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this); R600MCInstLower MCInstLowering(OutContext, STI, *this);
StringRef Err; StringRef Err;
if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) { if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) {